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News Release from: Synopsys | Subject: 2007.04a DesignWare IP for AMBA 2 and AMBA 3 AXI
Edited by the Electronicstalk Editorial
Team on 30 April 2007
DesignWare IP for AMBA 2 and AMBA 3 AXI
protocols
Latest release of DesignWare IP for the ARM AMBA 2 and AMBA 3 AXI protocols allows designers to integrate the high-speed protocol easily into their chips and focus on value-added differentiation.
The 2007.04a release of Synopsys' DesignWare synthesisable intellectual property for the ARM AMBA 2 and AMBA 3 AXI protocols allows designers to integrate the high-speed protocol easily into their chips and focus on value-added differentiation The new release includes a new I2S protocol IP for the APB bus, an AXI to APB3 compliant bridge with built in fabric, and a highly configurable AXI to AXI bridge supporting a multilayered AXI bus based design
This article was originally published on Electronicstalk on 19 Apr 2001 at 8.00am (UK)
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The release also includes extensive enhancements to the existing IP for the AMBA 2 and AMBA 3 AXI protocols.
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The AXI to APB3 bridge and fabric provides a seamless interface between the high speed AXI bus and the APB3 peripheral bus.
The AXI to APB3 bridge and fabric is backward compatible with the APB 2.0 protocol and supports all existing APB-based peripherals.
The AXI to AXI bridge provides upsizing, downsizing and multiple clock-domain synchronisation features between two AXI interconnects.
Additionally, the latest enhancement to the DesignWare interconnect fabric for AXI bridge includes bidirectional command support, solving the inherent master to slave communication paradox when two or more interconnects are connected together.
The DesignWare interconnect fabric also helps designers meet their performance and area requirements by offering the choice of three timing configurations, providing users with the additional flexibility to optimise timing by trading off latency for clock rate.
The DesignWare libraries for AMBA interconnect include all three parts required to facilitate AMBA protocol based subsystem designs: AMBA protocol compliant synthesisable IP; AMBA 2 and AMBA 3 Assured Verification IP; and coreAssembler, an automated tool for rapidly assembling, configuring, and implementing AMBA 2 and AMBA 3 AXI protocol based subsystems.
"We chose Synopsys' DesignWare Library because we needed an array of proven AMBA-protocol-based IP for our latest design subsystem", says Andre Chartrand, Vice President of Engineering at Entropic Communications.
"The DesignWare IP simplified subsystem integration, and its flexible configuration helped us meet our timing and area goals without sacrificing important features".
"In addition, Synopsys' DesignWare library subscription model, which includes both synthesisable and verification IP, delivered a single-vendor source for our design and verification team's needs".
"Quality IP availability and automation of subsystem assembly are key to reducing project design cycles", says John Koeter, Senior Director of Marketing for the IP and Services Group at Synopsys.
"The DesignWare solution for the AMBA protocol includes all the common, frequently used infrastructure building blocks, verification IP, and assembly tools, making it a comprehensive library of AMBA protocol based IP".
"This portfolio of proven IP reduces risk and enables more predictable success for engineers implementing the popular AMBA protocol standard".
The 2007.04a release of DesignWare synthesisable IP for the AMBA 2 and AMBA 3 AXI protocols is available now.
DesignWare Library licensees have access to this IP at no additional cost.
RTL source code is available for license separately, on a pay per use basis.
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