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Simulator speeds standard cell signoff

A Synopsys product story
Edited by the Electronicstalk editorial team Sep 27, 2007

ARM relies on fast, accurate circuit simulation to quickly characterise its comprehensive physical IP across its complete set of foundry and process nodes.

Significant performance improvements in the latest version of the Synopsys HSpice simulator have enabled ARM to accelerate delivery of highly optimised memory and standard cell building blocks for SoCs.

The 2007 versions of the HSpice simulator, the gold standard for accurate circuit simulation, offer significant transient algorithm, netlist parsing, model performance and convergence improvements over earlier releases.

These enhancements help enable faster, more accurate simulation.

ARM relies on fast, accurate circuit simulation to quickly characterise its comprehensive physical IP across its complete set of foundry and process nodes.

"As the characterisation complexity of Physical IP at advanced process nodes escalates dramatically, significant improvements in the performance of HSpice are necessary to reach closure", says Dr John Goodenough, Director, Design Technology at ARM.

"Using the latest version of the HSpice simulator, we are now able, on average, to get a seven times faster throughput on typical standard cell and memory circuit workloads than we did with earlier versions of the HSpice simulator".

"These new advances in HSpice's performance have enabled us to combat the increasing simulation and accuracy needed to deliver highly accurate physical IP on advanced technology nodes, such as 45nm, to our customers".

"The ARM use of HSpice for memory and standard cell characterisation is a clear indication of Synopsys' strength in providing both the highest silicon accuracy and leading runtime performance", adds Paul Lo, Senior Vice President of Synopsys' analogue mixed signal group.

"Increasing design complexity continues to drive the need for silicon accurate simulation, and the Synopsys AMS development team is focused on researching and developing ever faster simulation technology for both single CPU and parallel simulation applications".

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