Product category:
Design and Development Software
News Release from: Synopsys | Subject: Star-RCXT
Edited by the Electronicstalk Editorial
Team on 14 December 2007
Parasitic extraction works on 45nm
process
Collaborative effort validates advanced modelling of key process variation effects that impact the performance of digital, analogue and memory circuits.
The Synopsys Star-RCXT parasitic extraction solution is now available fully qualified for TSMC's 45nm process technology This qualification is the result of collaboration between Synopsys, Altera and TSMC to develop and silicon-validate advanced modelling of key process variation effects that impact the performance of digital, analogue and memory circuits
This article was originally published on Electronicstalk on 5 Jun 2003 at 8.00am (UK)
Related stories
Toshiba signs off at 90nm with Star-RCXT
Toshiba has standardised on Star-RCXT as the parasitic extraction tool for its 90nm TC300 design technology.
Parasitic extraction package validated
Star-RCXT - the industry standard for RC parasitic extraction - has been validated for UMC's most advanced 90nm processes.
Altera, a pioneer in programmable logic, is now deploying Synopsys' Star-RCXT as the preferred extraction tool for its 45nm design signoff flow.
"We have successfully used Synopsys' Star-RCXT extraction tool on our 90 and 65nm devices", says Eugene Chen, Director of CAD Engineering at Altera Corporation.
"Our recent collaboration on modelling advanced 45nm process effects increases our confidence in the ability of the Star-RCXT solution to ensure the success of our next generation devices as well".
Further reading
Parasitic extraction solution verified for TSMC
TSMC has verified Star-RCXT - a key product in Synopsys' Galaxy design platform and standard in the TSMC Reference Flow.
Tools smooth the way from FPGAs to 65nm process
Altera has deployed Synopsys' Star-RCXT extraction tool and HSIM FastSpice simulator for its FPGA design flow targeting TSMC's 65nm Nexsys process technology.
"We have now standardised on the Star-RCXT solution for our 45nm design flows on the merits of its subfemtofarad accurate process modelling, its proven track record at each successive technology node and its seamless integration with our existing Synopsys signoff solutions".
Synopsys, Altera and TSMC worked together to develop modelling specifications for two key 45nm interconnect process effects - microloading and gate-to-contact coupling capacitance variation.
TSMC and Altera validated that the Synopsys Star-RCXT solution provides accurate modelling of these and other 45nm process effects caused by lithography variation, chemical mechanical polishing (CMP), width dependent temperature variation and dielectric damage in ultra low-K process.
"TSMC and Synopsys collaborated early on to address 45nm interconnect modelling of microloading effects and gate-to-contact capacitance variation", says Kuo Wu, Deputy Director of Design Service Marketing at TSMC.
"The Synopsys Star-RCXT extraction tool has satisfactorily completed our qualification criteria to take full advantage of TSMC's leading 45nm process technology with a high standard of model accuracy".
"The Star-RCXT solution's continued technology lead is the result of our long standing collaboration with industry leaders such as TSMC and Altera", said Robert Hoogenstryd, Director of Design Analysis and Sign-Off Marketing at Synopsys.
"The 45nm qualification and first to deploy success of Star-RCXT is yet further proof of our customers' confidence in the tool's ability to deliver silicon success for their most advanced designs".
• Synopsys: contact details and other news
• Email this article to a colleague
• Register for the free Electronicstalk email newsletter
• Electronicstalk Home Page
Search the Pro-Talk network of sites
