Product category:
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News Release from: Synopsys | Subject: DesignWare LE IP for PCI Express
Edited by the Electronicstalk Editorial
Team on 03 April 2008
PCI Express endpoint controller runs on
FPGAs
The DesignWare LE IP for PCIe is a cost-effective solution that provides innovative ease-of-use features to simplify the complexities of transitioning to PCI Express.
Synopsys has announced the availability of the DesignWare LE IP for PCI Express (PCIe) optimised for ASIC and FPGA designs that use a single lane (x1) PCI Express endpoint interface The DesignWare LE IP for PCIe is a cost-effective solution that provides innovative ease-of-use features to simplify the complexities of transitioning to PCI Express for applications requiring a single lane, such as existing PCI/PCI-X designs, ExpressCards, Ethernet controllers, SATA controllers and wireless hubs
This article was originally published on Electronicstalk on 19 Apr 2001 at 8.00am (UK)
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The new DesignWare LE endpoint digital controller IP for PCIe provides a simplified feature set that enables designers to benefit from a 20% area reduction in their ASIC or FPGA implementations while maintaining the same architecture and interfaces as Synopsys' complete DesignWare IP for PCIe solution.
By maintaining interface compatibility, designers can upgrade to a full-featured version when future designs require additional functionality.
The silicon-proven DesignWare LE IP is a part of Synopsys' complete PCI Express IP portfolio and has successfully passed the PCI Express compliance testing at the PCI-SIG interoperability workshops.
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The DesignWare LE IP has several innovative ease-of-use features to lower the integration time and cost of incorporating PCI Express IP into a design.
The DesignWare LE IP automatically connects the PCI Express digital controller and PHY together.
During implementation, the DesignWare LE IP automatically optimises the parameters across the PIPE interface and synthesises the complete PCI Express interface.
In addition, the new IP includes a reference design that helps designers quickly integrate the PCI Express interface, while providing a starting point for the assembly and verification of their chip design.
"The new DesignWare LE IP for PCI Express is designed specifically to address the needs of ASIC and FPGA designers who are looking for an easy upgrade path to PCI Express IP at a competitive price point", says John Koeter, Senior Director of Marketing for IP and Services at Synopsys.
"More than 40% of ASICs and ASSPs that utilise PCI Express contain a single lane endpoint solution".
"As the technology leader for PCI Express IP, we continually invest in providing innovative products that help designers quickly integrate PCI Express interfaces while lowering risk and meeting their critical market windows".
The DesignWare LE IP for PCI Express is available immediately.
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