Product category:
Design and Development Software
News Release from: Altium | Subject: Altium Designer
Edited by the Electronicstalk Editorial
Team on 04 April 2006
Compiler creates hardware and software
from C code
Altium is unveiling its next-generation unified hardware/software compiler technology at the Embedded Systems Conference in San Jose.
Altium is unveiling its next-generation unified hardware/software compiler technology at the Embedded Systems Conference in San Jose Built on Altium's high-performance Viper ANSI/ISO C-compiler platform, the new compiler system can simultaneously generate both highly optimised executable code and concurrent hardware for implementation in FPGAs from standard C code
This article was originally published on Electronicstalk on 16 May 2005 at 8.00am (UK)
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As well as the target executable code and FPGA hardware implementations, the system also generates all of the required code to link the two together at run-time.
"Through our Tasking products, we have distilled more than 25 years' experience in building highly optimised C compilers into our Viper technology", said Nick Martin, Founder and CEO of Altium.
"This has allowed us to take C compilation to the next level and provide embedded software developers with real and practical access to concurrent hardware implementation using FPGAs without the need for RTL/hardware design expertise".
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Design suite extends to low-cost Lattice FPGAs
Altium is supporting Lattice Semiconductor's LatticeEC and LatticeECP FPGA devices as part of its recently released Service Pack 4 (SP4) for Altium Designer.
ESL by any other name
The latest hot topic in the chip design world recently has been electronic system level design, says Rob Irwin, Product Marketing Manager at Altium.
Suite caters for denser boards and faster signals
Altium Designer 6.0 is the latest version of the groundbreaking unified electronic product development system.
The initial application of this next-generation compiler technology, demonstrated at ESC, will allow embedded engineers using the Altium Designer unified electronic product development system to accelerate applications by automatically and transparently offloading selected C functions from the processor into hardware.
The system automatically generates hardware within an FPGA to execute the selected functions, and compiles the remaining software to automatically make use of that hardware.
The unified compiler technology, combined with Altium Designer's hardware- and software-level portability between processors, allows developers to make crucial architectural decisions later in the design process, after the application requirements are more specifically known.
Moving selected functions to concurrent hardware in FPGAs also alleviates the need to employ a higher performance processor or run the system at high clock speeds in order to achieve better performance.
Execution speed can be improved by transparently offloading processor-intensive functions into dedicated hardware.
This reduces the need to move to a faster and more expensive processor, which also has the benefit of reducing the need for different approaches to be taken to board design to cope with the speed increase at the board level.
Because the system uses standard ANSI/ISO C, it allows all software developers to harness the benefits that programmable hardware can bring to the design process without the need for them to have RTL or board-level hardware design expertise.
Software developers can use their existing skills to manipulate the hardware platform on which their software runs and use hardware as needed to accelerate application performance.
"The emergence of high-capacity FPGAs at low cost has the potential to allow developers to leave open system architecture decisions until later in the design cycle when the functional needs are much better understood", commented Martin.
"Altium Designer unifies hardware and software design to allow all engineers, designers and developers to harness this potential and take a new approach to development that gives them complete freedom to experiment with different implementation paths throughout the development cycle".
One of the major benefits that this unified compiler technology brings to Altium Designer is that it allows developers to quickly and easily try out various code implementation options without the need to manually re-engineer the system hardware, or sacrifice portability by moving functions to assembly code.
Developers simply select the functions within their ANSI/ISO C code they want implemented in hardware.
The application can then be reprocessed within Altium Designer and downloaded to a suitable FPGA development board for testing and debug.
Altium's NanoBoard, a versatile nano-level breadboard featuring a unique plug-in architecture that supports the swapping of target devices and peripheral sets, has been specifically developed to allow engineers to fully exploit the design freedom allowed by Altium Designer.
It enables engineers to interactively debug both hardware and software and quickly modify the development environment to support the implementation path being explored.
Altium Designer's unified environment makes it easy for designers to move between different processor architectures, and between different execution platforms - soft processor, discrete processor or hybrid processor immersed within an FPGA.
The new unified hardware/software compiler technology will make it just as easy for engineers to try out different software and hardware implementation paths for their code.
This brings unprecedented freedom to the design process, allows greater experimentation, speeds system development and allows more intelligence to be added to products by fully harnessing the potential of today's programmable devices.
The unified hardware/software compiler technology will be available in Altium Designer 6.0 as part of a software update scheduled for release later in the quarter.
Altium Designer 6.0 is available for purchase through Altium's sales and support centres worldwide.
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