Product category:
Standard Logic Devices
News Release from: Texas Instruments (April 2001-March 2006) | Subject: QFN-packaged logic
Edited by the Electronicstalk Editorial
Team on 02 May 2002
QFN package is smaller and cooler than
TSSOP
Texas Instruments, IDT and Hitachi have combined to introduce 20-, 16- and 14-pin quad flat no-lead (QFN) packaging for gate and octal bit width logic devices.
Texas Instruments, IDT and Hitachi have combined to introduce 20-, 16- and 14-pin quad flat no-lead (QFN) packaging for gate and octal bit width logic devices Designers can take advantage of reduced form factors in personal digital assistants, cell phones, and other handheld consumer electronics, as well as in advanced networking and communications applications by using this package, which is up to 62% smaller compared with thin scale small outline packages (TSSOP) in the same bit widths
This article was originally published on Electronicstalk on 8 Nov 2004 at 8.00am (UK)
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TI will initially introduce QFN packaging in its ABT, LVC, LVTH and LV-A technologies for gate and octal functions.
Full production is planned to ramp in other advanced BiCMOS and CMOS technologies, including the 1.8V optimised AUC family, later in 2002 and into 2003.
"We are continuing our efforts to advance the logic market to meet our customers' needs with reliable and innovative logic and packaging technologies", stated David Hoover, worldwide product marketing manager for TI's Standard Linear and Logic Group.
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"With a strong alternate source partnership with IDT and Hitachi, we were able to introduce logic in the QFN package to give designers the real estate they need to shrink their form factors while improving performance and reliability".
TI, IDT, and Hitachi have been working closely to define common dimensions and logic functions to be incorporated in the package to supply a standard QFN package to the logic market.
This joint effort ensures customers availability from multiple sources.
"The availability of an alternate source, especially in an advanced package or technology, reassures me that this package is a recognised standard and that the accessibility to such devices is assured", said Lawrence Conrad, vice president of semiconductors - Global Materials Services for Solectron.
IDT plans to release devices with QFN packaging in late 2002.
"As a company strongly focused on providing semiconductor solutions for the communications network and a leader in product innovation, we recognise the value in leveraging our digital design expertise with sophisticated packaging technologies to provide our customers advanced logic solutions", said Kevin Walsh, director of strategic marketing for IDT's Timing and Logic Division.
"Our collaboration with TI gives our mutual customers a highly specialised package option to meet their advanced networking and communications design requirements, while ensuring product availability".
Hitachi has plans on releasing logic devices in this QFN packaging technology in late 2002.
"It is very important to our customers that an alternate source is established in new packaging technologies, as well as advanced logic technologies.
This is why it is significant that Hitachi joins TI and IDT with the introduction of logic in this QFN package", said Yukiya Kamiya, Standard Linear and Logic department manager for Hitachi.
"This package will offer the Japanese market an improved alternative for gate and octal logic devices".
Ideal for portable consumer electronics, the QFN has footprint, height, and weight advantages over the TSSOPs.
The body dimensions of the QFN are JEDEC (MO-220) compliant with the 20-pin QFN having a footprint of 15.75mm2.
All three QFN pin-counts have a height of 1.00mm, meeting the most aggressive thickness standards for portable applications.
The QFN package is not limited to just size advantages over the TSSOP.
With the exposed die pad, the QFN packages offer improved thermal performance due in part to the absence of plastic between the die and the board.
The die pad may also be used as a ground.
According to QFN modelling data, thermal performance improved up to 55% over TSSOP, and electrical performance (inductance and capacitance) improved 60% and up to 30% respectively over the TSSOP package.
With the same pinout as the TSSOP, the QFN pinout eases routing.
TI is fully supporting the QFN package release with complete technical documentation, including an application report and qualification data.
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