Product category:
Analogue and Mixed Signal ICs
News Release from: Texas Instruments (April 2001-March 2006)
Edited by the Electronicstalk Editorial
Team on 19 July 2002
New process on stream for 300mm wafers
Texas Instruments is now manufacturing customer-qualified 300mm wafers using its 130nm copper process technology in its DMOS 6 facility.
Texas Instruments is now manufacturing customer-qualified 300mm wafers using its 130nm copper process technology in its DMOS 6 facility The move to 300mm wafers and a 130nm process provides up to 2.4 times more die per wafer than 200mm and reduces production costs by 30-40% while delivering smaller, higher performance, lower power products
This article was originally published on Electronicstalk on 8 Nov 2004 at 8.00am (UK)
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The first products from DMOS 6 include wireless baseband processors for TI's large base of mobile handset and PDA customers.
Sun Microsystems UltraSPARC microprocessors are also scheduled to soon take advantage of DMOS 6 advanced 130nm process technology and 300mm wafer production.
"TI is now one of the few semiconductor manufacturers in the world with 300mm wafers and a fully qualified 130nm process flow in production", said Dan Hutcheson of VLSI Research "The investment return is significant in terms of reduced cost per die and higher performance processors, but just as important, it is proof of TI's leadership role in the competition for advanced manufacturing capability".
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The DMOS 6 facility is TI's most advanced production facility and is located on the same North Dallas campus where Nobel Prize winner Jack Kilby first invented the integrated circuit.
Covering over 15,000m2 of clean room space, DMOS 6 has a class 100 clean room containing only 100 particles of dust or contaminant per cubic foot of air.
(The average cubic foot of air has between 300,000 and one million particles.) The facility is capable of producing 35,000 wafers a month when fully used and as the market for TI's most advanced products grows, so will the total volume of production in DMOS 6.
Current plans call for tooling to be in place to produce 10,000 wafers a month by the end of 2002.
"TI is one of only a few top semiconductor companies that continue to invest in the development of the complex processes required to build next generation integrated circuits in volume", said Rich Templeton, executive vice president and COO of Texas Instruments.
"With 130nm process technology now running on 300mm wafers, Texas Instruments is delivering on its commitment to quickly turn research from its labs into product roadmaps our customers can believe in".
The 130nm process node, which TI qualified for production in March, is already delivering chips with 180 million transistors in a package smaller than a nickel.
Over 50 different prototype products from 130nm manufacturing facilities have already been shipped to customers worldwide.
Operating frequencies exceeding 1GHz, internal voltages of 1.2V and below, and support for I/O signalling environments of up to 3.3V are either in production or planned.
TI's exceptional SRAM bit density at 130nm, another common benchmark measurement for chip manufacturers, allows up to 24Mbit of SRAM to fit on a single device.
With up to seven layers of copper signal routing, the 130nm process builds on TI's original qualification of copper in semiconductor manufacturing at the 180nm level.
Along with high-performance digital logic, TI's 130nm process is fully capable of producing analogue functionality as well, allowing advanced integration of mixed-signal functions.
This integration capability allows TI to leverage its market and technology leadership in mixed-signal products and DSPs to create complete system solutions on a single chip.
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