Product category:
Analogue and Mixed Signal ICs
News Release from: Texas Instruments (April 2001-March 2006)
Edited by the Electronicstalk Editorial
Team on 21 October 2003
Improved processes push CMOS to new
levels
Texas Instruments is taking advantage of several new proprietary techniques, including strained silicon, to develop chips with dramatically faster transistors.
Texas Instruments is taking advantage of several new proprietary techniques, including strained silicon, to develop chips with dramatically faster transistors By raising transistor performance over 50% using a conventional planar CMOS transistor, TI can cost-effectively deliver higher performance products using its installed base of high-volume manufacturing equipment
This article was originally published on Electronicstalk on 8 Nov 2004 at 8.00am (UK)
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"Finding effective new ways to push the performance envelope using standard CMOS without sacrificing cost, yield or reliability is what customers expect from TI", commented Hans Stork, Senior Vice President and Director of Silicon Technology Development.
"While we explore moving to innovative new materials and transistor structures, TI continues to drive innovation using the same economical CMOS structure the industry has relied on for decades".
By pushing the parameters of its 90nm process, TI expects its transistor performance to improve over 50% compared with its fastest 130nm transistor.
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TI's highest performance CMOS logic relies on an industry leading, 37nm gate length and highly effective gate dielectric scaling to reduce capacitance and increase drive current, the primary factors in transistor switching speed, which in turn determines processor operating frequency.
Other improvements combining to drive performance in both the NMOS and PMOS transistors include strain induced on the transistor channel to increase electron mobility, nickel silicide to lower gate resistance, and ultra-shallow source/drain junctions.
TI also continues to drive the trend toward 2.9k (OSG) dielectric material from 3.6k (FSG) used in the previous generation.
Low-k materials reduce capacitance and propagation delays within the interconnect layers of a device, further boosting the overall chip performance.
Sun Microsystems, the driver for TI's highest performance process technology, will take advantage of the higher operating frequencies and transistor densities made possible by TI's 90nm process on its UltraSPARC 64bit microprocessor.
"The underlying process technology Sun receives from TI is critical to the future of chip multithreading (CMT) which is at the heart of our throughput computing strategy", said Dr.David Yen, Executive Vice President, Processor and Network Products Group, Sun Microsystems.
"The radical new designs we have planned will require the increased density and speed afforded by this new 90nm process technology, and will be key to bringing advanced UltraSPARC processors to market".
TI builds a variety of optimised process flows for each technology generation to provide the best performance for different end equipment requirements.
The different flows are carefully targeted to achieve the right application balance between transistor performance and power consumption.
In January TI became one of the first semiconductor companies to deliver working 90nm products with a wireless baseband chip built with a low power version of its process.
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