Top performance from integrated clock multiplier

A new highly integrated clocking IC features three on-chip phase locked loop filter components and best-in-class performance.

Leveraging its process technology capabilities, Texas Instruments has released a new highly integrated clocking IC that features three on-chip phase locked loop (PLL) filter components and best-in-class performance.

The new clock multiplier's architecture eliminates the need for external components to support PLL structures, which reduces overall system cost and conserves board space.

With very low period jitter and ability to generate multiple clock frequencies, the technology behind the device is well-suited for consumer electronics such as game systems, DVD player/recorders, digital televisions and set-top boxes.

From a 54MHz system clock, the CDC5806 generates a video, audio, CPU, USB and portable memory clock out of a single device.

Three PLLs generate the various output frequencies from the system clock.

On-chip loop filters and internal feedback eliminate the need for external components.

Developed in TI's RF SiGe process, the CDC5806 offers low jitter for clock distribution and a very low peak-to-peak period jitter of up to 150ps.

Future clocks developed in this process will integrate features that help reduce electromagnetic interference (EMI), such as variable spread spectrum clocking (SSC).

Variable SSC also enables system designers to fine-tune their designs by allowing them to test various levels of SSC in the system.

TI's technology allows integration of such features while maintaining excellent PLL frequency isolation.

The CDC5806 comes in a 20-pin TSSOP and is available now from TI and its authorised distributors.

Suggested resale pricing is $2.15 each in quantities of 1000 units.

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