Product category:
Microprocessors, Microcontrollers and DSPs
News Release from: Texas Instruments (April 2001-March 2006) | Subject: TMS320C6455
Edited by the Electronicstalk Editorial
Team on 17 May 2005
Top-end DSP brings Serial RapidIO on
chip
TI's latest DSP offers improved performance, reduced code size plus more on-chip memory and high bandwidth integrated peripherals.
Building on its leadership in high-performance signal processing, Texas Instruments has released the TMS320C6455 digital signal processor (DSP), offering improved performance, reduced code size plus more on-chip memory and high bandwidth integrated peripherals including the Serial RapidIO bus for interprocessor communications Using the new C6455 DSP, developers of telecommunications, network and video infrastructure end equipment and high-end imaging systems will see a system performance gain thanks to 2-12x boosts in performance and I/O bandwidth, allowing them to integrate more high-bandwidth channels, achieve higher image definition, and produce more efficient software easily for faster time to market
This article was originally published on Electronicstalk on 8 Nov 2004 at 8.00am (UK)
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"The C6455 from TI supports our strategy for next generation DSP modules by enabling a step up in system performance for infrastructure applications requiring multiple DSPs per board while preserving our software investment", said Paul Virgo, Director BPO Marketing, Motorola Embedded Communications Computing.
"By combining low power per channel, delivered by the 90nm process technology, with an easy to implement Gigabit Ethernet infrastructure, the C6455 will allow us to enhance our range of building blocks and application-enabling platforms".
The new C6455 DSP, 100% code compatible with previous TMS320C64x devices, incorporates Serial RapidIO and other new high-bandwidth peripherals.
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New peripherals and features of this chip, as compared with previous 1GHz C64x DSPs, include: Serial RapidIO, featuring up to 25Gbit/s interconnectivity, enabling high performance multiprocessing that is 12x faster than previous external memory interfaces; gigabit Ethernet MAC offering 10 times more Ethernet bandwidth than previous C64x devices; DDR2 external memory interface delivering twice the throughput of currently available devices; 66MHz PCIbus interface providing twice the frequency of previous processors; and 2Mbyte of L2 memory giving OEMs twice the amount of memory as previous C64x devices.
The C6455 DSP's integrated industry-standard Serial RapidIO bus reduces overall system cost by removing the need for additional devices used for switching and processor aggregation.
Supported by an industry association of leading device, system and software manufacturers, the Serial RapidIO interconnect enables high-speed, packet-switched peer-to-peer connectivity.
Serial RapidIO thus makes it much easier to implement multiprocessing, providing a performance breakthrough for multichannel implementations on multiple processors.
For video infrastructure applications, a 1x link is fast enough to send high-definition (HD) 1080i raw video between devices and a 4x link can easily send HD 1080p raw video between devices with bandwidth to spare.
The use of Serial RapidIO in infrastructure applications with large "DSP farms" will allow the reduction of system cost (device count, board size and/or device cost) for OEM customers.
The enhanced C64x+ DSP core on which the C6455 DSP is based adds new specialised instructions that on average, make code 20 to 30% more compact and 20% more cycle efficient than code based on TI's current advanced C64x DSP architecture.
The new instructions include complex and 32bit wide multiplications and simultaneous add/subtract instructions, increasing fast Fourier transform (FFT) and discrete cosine transform (DCT) performance.
The core can execute eight 16 x 16 multiply and accumulate instructions per cycle, twice as many as the current C64x DSP core.
As the new C64x+ instruction set is a superset of the C64x instructions, software for the new device is 100% object code compatible with code for existing C64x DSPs, permitting customers to leverage their software investment and get started with the new C6455 DSP right away.
Benchmarked independently by Berkeley Design Technology (BDTI), an independent analyst firm, TI's C64x+ DSP core at 1GHz received BDTIsimMark2000 of 10,980, the highest score BDTI has published for a DSP to date.
(The BDTIsimMark2000T provides a summary measure of DSP speed).
"TI's heavy lifter C64x+ based enhanced engines can now talk to each other at high speed in multiprocessing configurations", said Max Baron, Principal Analyst at In-Stat.
"The Serial RapidIO on the C6455 has the high bandwidth and protocols to enable increases in infrastructure and imaging system performance at lower cost through reduction of chip count and board area".
"As the telecom, imaging, networking and video industries continue to develop new services, the C6455 DSP's programming flexibility allows developers to keep pace with changes in standards and to quickly implement multiple voice and video codecs in their system designs", said Thomas Brooks, DSP Platform Marketing Manager, TI.
TI's Code Composer Studio integrated development environment (IDE), the industry's most comprehensive and intuitive IDE for DSPs, includes the industry's most advanced optimising C compiler and code-tuning development tools.
The industry's most robust network of DSP third parties helps simplify development and speed time to market with algorithms for applications such as videoconferencing, voice and video gateways, media servers and advanced computer telephony integration (CTI) messaging.
Because the C6455 DSP is 100% code-compatible with earlier C64x DSPs, customers can start development immediately leveraging the C compiler, assembler, linker and simulator available today.
TI also offers the THS4509, the lowest noise, lowest distortion fully differential amplifier for driving high-speed analogue-to-digital convertors (ADC) such as the ADS5500 14bit, 125Msample/s ADC.
TI's high-performance analogue and DSP products provide a state-of-the-art signal chain for wideband applications.
Based on TI's advanced 90nm CMOS technology, the TMS320C6455 DSP will be offered by TI in 1GHz, 850MHz and 720MHz versions.
Order entry for preproduction units will open on 27th June 2005, with initial shipments in Q3 2005.
Volume production is scheduled for the second quarter of 2006.
The device will be available in a 697-pin 24 x 24mm BGA (ball grid array) package.
Planned pricing is $259 per 1GHz unit, $219 per 850MHz unit, and $179 per 720MHz unit in quantities of 10,000 units.
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