Webcast to explain undersampling with ADCs

Design engineers can register now on the TI website for a live Analog eLab webcast entitled "Using high-speed ADCs for undersampling".

Design engineers can register now on the TI website for a live Analog eLab webcast entitled "Using high-speed ADCs for undersampling".

Presented by Texas Instruments and Memec Insight, the webcast will air at 1700 BST on Wednesday 8th June 2005.

This session, hosted by TI analogue expert Bill Klein, PE, will provide design engineers with an online lab environment for a discussion on theory and demonstrations at the lab bench.

Klein's guests for this webcast are Stephan Baier, Systems and Applications Engineer at TI, and Dan Ngai, Technical Business Manager at Memec Insight.

The free, hour-long session will explore the use of high-speed analogue-to-digital convertors (ADCs) for digitising input frequencies above the convertor's baseband region (DC to fs/2).

This is gaining a lot of popularity in communications-related applications when the intermediate frequency (IF) can be as high as 250MHz.

That frequency is usually too high to be digitised in an oversampling process.

Undersampling, also referred to as direct-IF down conversion, results in reduced component count as a complete analogue down conversion stage can be eliminated.

During the lab segment, Klein and Baier will review the theory and design techniques required to successfully select and apply high-speed pipeline ADCs for undersampling applications.

Lab examples will serve to illustrate this technique.

A special Q and A segment will follow the discussion and lab demonstrations.

Viewers are welcome to e-mail their questions to Klein and his guests for on-air ideas and recommendations.

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