Product category:
Analogue and Mixed Signal ICs
News Release from: Texas Instruments (April 2001-March 2006) | Subject: TVP7000 and TVP7001
Edited by the Electronicstalk Editorial
Team on 16 November 2005
Triple ADCs deliver rich video
New 8/10bit triple ADCs run at up to 165Msample/s, delivering rich video performance ideal for business projectors, televisions and set-top boxes.
Extending its line of mixed signal video offerings, Texas Instruments has introduced a pair of 8/10bit triple analogue-to-digital convertors (ADC) providing up to 165Msample/s Delivering rich video performance, the devices are ideal for business projectors, televisions and set-top boxes
This article was originally published on Electronicstalk on 8 Nov 2004 at 8.00am (UK)
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The TVP700x series of devices deliver a wide range of benefits including improved jitter-reduction performance, higher image quality in video systems and the ability to support the increased bandwidth needed from PC and high definition (HD) video output.
"With the release of these two new ADCs, DLP customers will have compelling new options to use in conjunction with DLP component sets".
"Both the TVP7000 and TVP7001 provide the video performance and quality our customers and the market demand in their products", said Frank Moizio, WW Strategic Marketing Manager for DLP Front Projection, TI.
"Both of these devices are fully compatible with current DLP Imaging ASIC products providing up to UXGA resolutions and 1080p analogue HD support".
The TVP7000, featured on the DDP2000 DLP reference design, provides sampling rates up to 150 MSPS and supports 1080p video inputs.
The TVP7001 is available with the DDP3020 DLP reference design and delivers up to 165Msample/s and increases PC graphics output to 1600 x 1200 at 60Hz ultra-extended graphics array (UXGA) quality.
The two devices also support a 10bit mode up to 110Msample/s allowing for superior video quality.
Both devices offer integrated phase-locked loops (PLL) for pixel clock generation, including 12-165MHz (12-150 TVP7000) pixel clock generation from horizontal synchronisation (HSYNC) signals.
An output formatter provides complete support for RGB/YCbCr 4:4:4 and YCbCr 4:2:2, as well as dedicated data clock for easy latching of output data.
The device also supports three digitising channels with individual clamps, an 8bit programmable gain amplifier, a 3:1 input multiplexer and automatic offset control for both YPbPr and RGB inputs.
The TVP7001 is sampling today with volume production scheduled for December 2005.
The TVP7000 is in production today.
Both devices are offered in a 100-pin lead-free PZP PowerPad HTQFP package.
Evaluation modules are also available.
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