Product category:
Standard Logic Devices
News Release from: Texas Instruments (April 2001-March 2006) | Subject: CDCE906
Edited by the Electronicstalk Editorial
Team on 09 December 2005
Clock multiplier produces six from one
A programmable clock multiplier with low jitter of 60ps and in-system spread spectrum adjustment improves performance, simplifies development and saves cost in consumer applications.
Texas Instruments has released a programmable clock multiplier with low jitter of 60ps and in-system spread spectrum adjustment that improves performance, simplifies development and saves cost in consumer applications Designers can hot program the device's three phase locked loop (PLL) components in-circuit to generate six output clocks from a single source for any frequency up to 167MHz, which speeds development of equipment such as digital set top boxes, digital televisions (DTV), DVD players, audio/video (A/V) receivers and printers
This article was originally published on Electronicstalk on 8 Nov 2004 at 8.00am (UK)
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The device is well-suited for clocking high-performance processors, including DaVinci products.
The CDCE906 provides advantages to help designers meet the performance requirements of consumer applications.
For example, the high-resolution PLL dividers of the CDCE906 provide a very low-jitter clock from a single 27MHz crystal clock and feature zero-PPM output clock error for most A/V frequencies and applications.
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This enables customers to achieve precise video and audio clock performance, including requirements for high-performance audio data convertors like the PCM1850 stereo audio analogue-to-digital convertor for DTVs.
Another key performance enhancement is provided by the device's hot-programmable spread spectrum clocking (SSC), which lowers system electromagnetic interference (EMI) and helps reduce the need for a metal shield to block EMI.
Hot-programmability enables designers to adjust the level of SSC on the fly, so they can rapidly fine-tune to optimise the system for EMI compliance qualification and also reduce the need for board redesigns for different applications.
Programmable output slew-rate control and selectable output voltages of 2.5 and 3.3V further reduce system EMI.
System performance also benefits from the device's extremely low jitter of 60ps.
Often, designers of A/V equipment must clock several devices such as a digital signal processor (DSP) or application-specific integrated circuit (ASIC) on their system board.
The CDCE906 makes this process easier and faster and reduces system costs by providing multiple programmable outputs.
It can accept a differential, LVCMOS or crystal input and generate six clocks from a single clock source.
Using on-chip EEPROM technology, designers can easily program and save the device's register settings in nonvolatile memory so that no re-programming is required at power-up.
In addition, designers can use the two-wire SMBus interface to dynamically reprogram the outputs while the device is in the system.
The CDCE906 is sampling today and will be in full production in Q1 2006.
Suggested resale pricing is $2.60 each in 1000-unit quantities.
A development kit and programming kit will be available to simplify PLL design and programming.
The device runs from a 3.3V supply over the commercial temperature range from 0 to 70C and is packed in a 20-pin thin shrink small outline package (TSSOP) package.
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