Sci-worx puts configurable processors to work

Edited by the Electronicstalk editorial team Apr 22, 2005

Sci-worx is to design a range of SoC intellectual property blocks, including H.264, WMV-9 and MPEG-2 for high-definition TV, using multiple Tensilica Xtensa LX configurable processors.

Sci-worx is to design several system-on-chip (SoC) intellectual property (IP) blocks, including H.264, WMV-9 and MPEG-2 for high-definition TV, using multiple Tensilica Xtensa LX configurable processors.

Current generation IP solutions from Sci-worx were designed with Register Transfer Level (RTL) logic methodologies.

By adding a configurable processor-based design approach to its portfolio, Sci-worx will speed design time and enjoy more flexibility to offer easier upgradability through software.

In addition to designing with Tensilica's Xtensa configurable processors, Sci-worx will become Tensilica's first value added reseller (VAR), distributing Tensilica processors as part of larger Sci-worx IP subsystems.

Sci-worx customers will be able to sign one licence agreement with Sci-worx that includes the necessary provisions for licensing the Xtensa processors inside Sci-worx designed IP blocks.

"The market requirement for multistandard video codecs for SD and HD resolutions requires more flexible solutions to address the high volume consumer market", stated Young-Hun Kluge, Vice President of Sales and Marketing, Sci-worx.

"We'll be able to get new IP out substantially faster and provide greater flexibility to our customers by using Xtensa processors instead of traditional RTL design methods".

"Sci-worx is an excellent example of a company that understands the benefits of using processors instead of hard coding algorithms into logic gates", stated Steve Roddy, Tensilica's Vice President of Marketing.

"We look forward to working as a partner with Sci-worx as they complete their new IP designs".