Product category:
Intellectual Property Cores
News Release from: Tensilica | Subject: Core-optimised IP Kits
Edited by the Electronicstalk Editorial
Team on 14 December 2006
Kits optimised to meet area, performance
and power
Tensilica and Virage Logic have jointly introduced 16 specially designed core-optimised IP Kits for Tensilica's Diamond Standard processor family members
Tensilica and Virage Logic, a pioneer in Silicon Aware IP and leading provider of semiconductor intellectual property (IP) platforms, have jointly introduced 16 specially designed core-optimised IP Kits for Tensilica's Diamond Standard processor family members for manufacture on TSMC's 130nm and 90nm G processes The new core-optimised IP Kits consist of Virage Logic's Area, Speed and Power (ASAP) Memory and ASAP Logic IP, and are optimised for each of the Diamond cores to allow designers to target area, performance or power
This article was originally published on Electronicstalk on 30 Mar 2005 at 8.00am (UK)
Related stories
Top score posted for licensable processor core
Tensilica has announced that it has posted the highest score ever recorded for a licensable processor core, and the highest absolute score ever published for any processor on EEMBC.
Configurable processors enable latest DSL design
UpZide is to develop a reference design using multiple Xtensa LX processors from Tensilica to implement the VDSL2 standard.
"As the industry's trusted IP partner, we're pleased to collaborate with Tensilica to provide our mutual customers with physical IP that is specifically tuned to optimise the performance of Tensilica's Diamond Standard product line processor cores," stated Jim Ensell, senior vice president of marketing and business development at Virage Logic.
"By making the core-optimised IP Kits available via our website, we're making this solution easily accessible and also helping our customers accelerate their silicon success".
"We've worked with Virage Logic for several years, and they've been an outstanding IP provider for our customers," stated Steve Roddy, Tensilica's vice president of marketing.
"Our Xtensa customers have completed many designs with Virage Logic's libraries".
"Now, with physical IP optimised for our Diamond Standard processors, we expect to provide our mutual customers with a greater competitive advantage".
The Core-Optimised IP Kits target four of Tensilica's Diamond Standard processors, a set of off-the-shelf synthesisable cores that range from area-efficient, low-power controllers to an audio processor and a high-performance DSP, all of which lead the industry in their respective categories both in lowest power and highest performance.
The Core-Optimised IP Kits provide access to Virage Logic's silicon proven embedded memory IP and standard cell libraries to meet a variety of market requirements.
Virage Logic's Core-optimised IP Kits for Tensilica's Diamond Standard processors, tuned to TSMC's 130nm and 90nm G process, are now available for general distribution from Virage Logic.
• Tensilica: contact details and other news
• Email this article to a colleague
• Register for the free Electronicstalk email newsletter
• Electronicstalk Home Page
Search the Pro-Talk network of sites
