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News Release from: Tensilica | Subject: Tensilica's software developers' toolkits
Edited by the Electronicstalk Editorial
Team on 23 January 2008
Development kit support expands board
options
Software developers can choose between the cost-effective Avnet LX60 board and the high-capacity Avnet LX200 board to speed their software design, debug and program optimisation processes.
Tensilica has added support for Avnet's Xilinx Virtex-4 LX200 development kit for high-speed hardware-based simulations of its Xtensa configurable and Diamond Standard processor families Now software developers can choose between the cost-effective Avnet LX60 board and the high-capacity Avnet LX200 board to speed their software design, debug and program optimisation processes
This article was originally published on Electronicstalk on 30 Mar 2005 at 8.00am (UK)
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"Design teams need to complete as much of the software development process as possible in parallel with the hardware development for complex System on Chip designs", stated Steve Roddy, Tensilica's Vice President of Marketing.
"By emulating our processors in an Avnet FPGA board, software developers can significantly speed up their development cycles when compared to using only software simulation methods".
Tensilica's software developers' toolkits (SDKs), consisting of an IDE (the Xtensa Xplorer integrated design environment), code development toolchain and Tensilica's instruction set simulator (ISS), work seamlessly with either Avnet FPGA board.
Further reading
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The software tools include libraries that enable software developers to use standard C library functions such as print to print out to the host PC and read/write from the hard disk of the host PC.
Designers using Tensilica's processors can take maximum advantage of an Avnet Virtex-4 Development Kit to gather extensive hardware-based profiling information.
With hardware-based profiling, developers can get an execution profile of the program, which allows the developer to quickly pinpoint execution hotspots.
This profile can be viewed graphically within Tensilica's Xtensa Xplorer IDE.
Using feedback compilation, a developer can set a flag so statistics can be collected on the number of times branches are taken or not taken during execution on the Avnet Xilinx development kit board.
The Xtensa C/C++ compiler then uses these run-time generated statistics and recompiles the program to optimise for speed by placing most frequently taken branches in straight-line code and for code size by compiling less frequently executed routines for code size rather than speed.
The feedback-based compilation method speeds up applications between 5 to 15% and reduces code size by up to 15%.
Additionally, the Ethernet interface on the boards make them suitable for running an operating system such as Linux and the associated TCP/IP stack and network file systems.
The two Xilinx Virtex-4 Development Kits are available directly from Avnet.
Tensilica supplies users with precompiled FPGA bitstreams that support the LX60 and LX200 boards.
For users of Tensilica's Xtensa configurable processors, the Tensilica processor generator automatically creates a custom FPGA bitstream specific to the Avnet boards for each Xtensa core configuration.
Tensilica customers can use these bitstreams on an unlimited number of Avnet LX60 or Avnet LX200 boards, thus enabling development teams with large numbers of software designers to cost-effectively deploy a large number of development systems.
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