SoC solution for channelised DS3/DS1/E1 access
The TranSwitch TEPro is a complete single chip plus software solution for next generation channelised DS3/DS1/E1/DS0 applications.
The TranSwitch TEPro is a complete single chip plus software solution for next generation channelised DS3/DS1/E1/DS0 applications targeting wireless access, multiservice access platforms (MSAPs), computer telephony, time division multiplexing (TDM) over packet, and echo cancellation units (ECU).
TEPro is a RISC-processor-based SoC with embedded DD-AMPS firmware and host API that supports the requirements of next-generation access systems by offering outstanding functionality and flexibility in a space-saving and cost-effective package.
TEPro is the latest and most advanced device in TranSwitch's family of broadband multiservice VLSI solutions, and supports the requirements of next-generation channelised DS3 access systems.
Supporting either one DS3, 28 DS1, or 21 E1 line interfaces, TEPro can be configured for a variety of operating modes thus increasing design flexibility.
The on-chip processor is addressed by the host via an abstracted, encapsulated, message-based application program interface (API), which alleviates the need for low-level programming, thus easing software integration efforts and accelerating product development and time-to-market.
"TranSwitch's TEPro raises the industry standard because the SoC and software are both key components of the product offering", stated Brian Stroehlein, TranSwitch's Product Marketing Manager.
"TEPro's software suite and high level of integration offer our OEM customers a lower project cost and a faster time to market.
We estimate that the firmware and host API that we provide royalty- and licence-free to our customers is worth approximately $750,000 in OEM project budget savings.
In addition, we anticipate further savings in the million dollar range, depending on the project, when 'cost of delay' in getting to market is considered".
TEPro integrates an M13/G.747 multiplexer including a DS3 framer with full C-bit functionality to support clear-channel DS3; a 28-channel DS1 framer; a 21-channel E1 framer; a 28-channel DS1/E1 cross-connect; a 672 x 4096 channel nonblocking DS0 crossconnect for grooming, concentration, switching and multiplexing; a message mailbox FIFO; a multichannel HDLC for Layer 1 and 2 SS7 (including FISUs) and ISDN-PRI signalling; MVIP and H.100/H.110 TDM bus interfaces; and a high-performance, on-chip RISC processor for flexible, programmable control.
TEPro is priced at $148 per unit in 1000-unit quantities with samples available Q3 2002.
TEPro is provided in a small footprint (27 by 27mm) 456-lead plastic ball grid array (PBGA) package and is pin- and API-compatible with TranSwitch's T3BwP device.
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