LDMOS process marries logic with power

Edited by the Electronicstalk editorial team Nov 7, 2006

Tower Semiconductor has launched a laterally diffused metal oxide semiconductor (LDMOS) process, the latest addition to its 0.18um technology platform.

Tower Semiconductor has launched a laterally diffused metal oxide semiconductor (LDMOS) process, the latest addition to its 0.18um technology platform.

The technology is produced in Tower's advanced Fab2.

High-voltage technology enables designers to integrate high-density logic and mixed-signal circuits together with high-voltage drivers on a single chip.

High-voltage LDMOS technology is widely used in LCD drivers for cellphone and other handheld displays, enabling smaller board area and lower power consumption, while providing the capability to handle high image rates.

Analysts forecasts that cellphone display shipments will amount to 1.3 billion units in 2007, up 4% from 1.2 billion cellphone displays in 2006.

Operating at 12V gate and up to 25V source/drain, the new devices can be easily used with Tower's off-the-shelf 0.18um devices, such as one-time programmable (OTP) and multi-time programmable (MTP) memory solutions, as well as Tower's rich portfolio of libraries and intellectual property (IP) circuits.

Using a highly effective trench isolation scheme, such products exhibit low noise and high immunity to latch-up.

Further development also is being done in order to enhance this offering with 40V source/drain and lower power-on resistance, while reducing mask count.

Such offering also addresses the specifications of a wide variety of power-management products.

"The addition of this high-voltage technology offering enables us to provide additional solutions to consumer markets of high demand", said Yossi Netzer, General Manager of Mixed Signal and RF-CMOS Products at Tower Semiconductor.

"The process was tuned to meet the unique specifications of portable displays".

The high-voltage technology is also available on Tower's shuttle programme for fast and inexpensive design verification and engineering samples.