Product category:
Design and Development Software
News Release from: Teklatech | Subject: FloorDirector
Edited by the Electronicstalk Editorial
Team on 28 May 2008
IC designers think of timing and power
Floorplanning optimisation technology is required for a wide range of SoC applications, including multimedia, DSP, wireless, networking and mobile.
Teklatech, the technology leader in floorplanning and clock distribution network solutions, has announced that its FloorDirector product has been exclusively chosen by Think Silicon for use in 90 and 65nm designs Think Silicon, an innovative European design centre and supplier of various IP and turnkey solutions, has selected the FloorDirector EDA tool for its unique floorplanning optimisation technology which is required for a wide range of SoC applications, including multimedia, DSP, wireless, networking and mobile
This article was originally published on Electronicstalk on 17 Mar 2008 at 8.00am (UK)
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FloorDirector's ability to deliver SoC power shaping and provide robustness to on-chip-variation were key factors in Think Silicon's decision.
"Using FloorDirector, Think Silicon will reduce its time to market and enable more profitable semiconductor products while providing their world-class services to the European and Israeli market", says Dr Tobias Bjerregaard CEO of Teklatech.
"We are extremely pleased to have Think Silicon as a customer".
"We were impressed by FloorDirector's ability to accurately analyse power signatures", says Iakovos Stamoulis, Director of Technology for Think Silicon.
"Because of FloorDirector's IR drop aware floorplanning, we were able to meet timing and power requirements easily and improve our time to market".
The FloorDirector floorplanning engine analyses the dynamic power signature of every system block and identifies initiators of critical voltage drop chains in the design.
Utilising novel power shaping techniques and statistical clock timing analysis, FloorDirector provides system-level IR drop and noise reduction solutions while maintaining scalable clock-level synchronisation.
This allows engineers to floorplan a chip for optimal power peak flattening, leading to reduced dynamic IR drop and improving overall signal and power integrity.
Sharon Akler, Director of Technical Marketing at Teklatech notes: "Without doubt, FloorDirector's ability to reduce dynamic IR drop, improve noise margins, and above all establish a predictable path to production, perfectly matches the requirements of the state-of-the-art system on chip (SoC) market".
"This collaboration with Think Silicon clearly demonstrates how semiconductor companies can leverage our technology in a broad range of applications, including digital and mixed signal ICs".
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