64bit processor puts life into 32bit applications

Toshiba's latest 64bit MIPS-based embedded processor combines high levels of peripheral integration with flexible external memory support to deliver a cost-effective alternative to 32bit processors.

Toshiba's latest 64bit MIPS-based embedded processor combines high levels of peripheral integration with flexible external memory support to deliver a cost-effective alternative to 32bit processors in applications requiring improved performance, lower power and reduced component count.

The TX4925 RISC processor uses Toshiba's 200MHz MIPS-based, 1.5V TX49/H2 core and delivers 250MIPS computing performance.

It is ideal for digital consumer and home networking applications such as xDSL gateways.

Supplied in a 256-pin PBGA package, the processor offers a comprehensive array of integrated peripherals that includes a dual-slot PCMCIA interface, a PCI controller, and an AC-link controller for cost-effective AC97 audio/modem codecs.

A direct memory access controller, two UART channels, a serial peripheral interface, 32 general-purpose I/O ports, an interrupt controller, three 32bit timer/counter channels, a 44bit real- time clock, and a high-speed serial concentration highway interface are also provided.

Designed to save board space and reduce component count, Toshiba's TX4925 features a variety of onboard controllers for external memory including an SDRAM/SyncFlash controller, an external bus controller and a NAND Flash controller.

The SDRAM controller can handle four channels of SDRAM in configurations up to 2Gbyte and the external bus controller supports six channels of ROMs, Flash, SRAM and memory-mapped I/O devices.

Integrated NAND Flash support will help designers to choose cost-effective NAND Flash rather than more expensive NOR Flash to meet user memory requirements.

As well as NAND and NOR Flash memory, the TX4925 also supports Micron's SyncFlash for faster accessing requirements.

Toshiba's 200MHz TX49/H2 MIPS-based core offers optimised five-stage pipeline processing and a 64bit datapath and incorporates a memory management unit.

A hardware multiply accumulator and an IEEE754-compliant single/double-precision floating point unit are also provided.

The core's instruction set supports MIPS I, II and III instructions as well as MIPS IV prefetch, multiply/add and debug instructions.

The TX4925 offers typical power consumption levels below 1W and incorporates two power-down modes.

In addition, a clock gear function enables the CPU clock frequency to be reduced by a factor of four to minimise overall power consumption.

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