Slimline packaging shrinks MOSFETs further

Toshiba has a new generation of miniature chip scale power MOSFET packages that are over 60% thinner than conventional TO-220SM (D2PAK) devices yet require 30% less PCB mounting area.

Toshiba Electronics has launched a new generation of miniature chip scale power mosfet packages that are over 60% thinner than conventional TO-220SM (D2PAK) devices yet require 30% less PCB mounting area.

The new 'slim TFP' package represents an evolution of Toshiba's thin flat package (TFP) technology and delivers a maximum board mounting area of 10.7 x 9.2mm.

A profile of just 1.7mm is 45% lower than the previous generation of TFP devices.

Power mosfets based on the slim TFP packaging will be ideal for high-efficiency, high component density power designs including DC/DC convertors and automotive applications.

Combining a very low thermal resistance with low on-resistance ratings, the new slim TFP packages have high DC current handling capabilities and are rated for power dissipations up to 125W.

A four-pin structure (gate, drive source, main current source and drain) minimises the effects of parasitic inductances while ensuring improved immunity to electrical noise.

The first Toshiba mosfet to make use of the slim TFP packaging technology will be a 500V, 8A device with an on resistance of 750mohm.

This mosfet will be particularly suited to the European power conversion market.

Future devices will include low-loss mosfets based on high-speed U-MOSII and p-MOSV technologies and offering voltage ratings of 200 and 250V.

(This was Electronicstalk's Top Story on 17 May 2002).

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