Companion chip puts handsets in the picture

A novel European-developed IC provides a cost-effective, optimised and low power interface between a CMOS camera sensor and a GSM/GPRS baseband chip.

A novel application-specific standard IC provides a cost-effective, optimised and low power interface between a CMOS camera sensor and a GSM/GPRS baseband chip.

The Chameleon mobile phone camera companion IC relieves the baseband IC of the performance-consuming picture processing task and allows phone designers to simplify the circuitry, minimise the component count, and reduce the cost of cameraphone solutions.

The Chameleon IC combines a CMOS camera interface and a host interface for the baseband chip with on-chip image processing and video memory functionality.

The camera interface supports a wide variety of VGA, CIF and other CMOS sensor input formats.

Communication with the GSM/GPRS baseband processor via the memory interface offers flash memory style and page burst mode support, and no additional components or modifications to the baseband IC are required.

During operation the Chameleon IC captures incoming data from the CMOS sensor inside a frame grabber.

This frame grabber synchronises the video data and then processes the synchronised data.

Onboard processing options including cropping of input image, flexible scaling between 1/32 and 4x, colour format conversion, YUV2RGB conversion, and a freeze mode.

The processed output image can then be passed via the host interface to the baseband chip, or can be JPEG-encoded by the Chameleon's onboard JPEG block for JPEG and motion JPEG output.

The Chameleon IC provides onboard video storage that can be used to store full images for snapshots or to act as the buffer to the baseband IC for reading out large data blocks in burst access mode.

This onboard storage allows the device to intermediately store a full image of QCIF size (176 x 144 pixel) or JPEG-encoded images, with VGA, QVGA and other image sizes supported in streaming mode.

Chameleon connects to the CMOS image sensor via an 8bit interface (plus data clock).

This interface supports 4:2:2 YCbCr (encoded to ITU-R 601 or ITU-R 709), RGB encoded 8:8:8 (8bit per colour) and 8bit monochrome data.

An onboard I2C master provides camera control functionality.

Non-JPEG compressed data output formats are 4:2:2 YCbCr, RGB encoded 5:6:5 (16bit) and RGB encoded 8:8:8 plus 8bit alpha value (32bit).

The IC's asynchronous page mode memory interface offers 8bit datacommunication and allows high video throughput DMA access.

In addition, the IC offers eight general-purpose I/O lines and incorporates a low power mode.

Toshiba's Chameleon IC is based on the company's TC260 0.18um CMOS process and is supplied in a BGA72 package measuring just 8 x 8mm.

The company has also developed a Chameleon demonstration and development board and offers a full set of support documentation.

Samples of the new ASSP are available now and volume pricing will be below Eur 2.5.

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