Product category:
Memory Devices and Modules
News Release from: Toshiba Electronics Europe
Edited by the Electronicstalk Editorial
Team on 22 December 2004
New method overcomes CMOS thermal
instability
Toshiba has developed a new method for suppressing thermal instability and current leakage in MOS transistors that supports advanced CMOS fabrication at 45nm gate lengths and beyond.
Toshiba has developed a new method for suppressing thermal instability and current leakage in MOS transistors that supports advanced CMOS fabrication at 45nm gate lengths and beyond The new technology will contribute to the continued application of CMOS technology to future generations of LSI
This article was originally published on Electronicstalk on 8 Nov 2004 at 8.00am (UK)
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The conventional NiSi layer in a shallow junction is thermally unstable; subjecting the layer to heat results in large current leakage.
Toshiba has developed a method to suppress this thermal instability that is based on implanting fluorine ion into the surface prior to the formation of the NiSi layer.
This solution directly addresses a significant problem in the LSI manufacturing process, and offers a solution for advanced CMOS fabrication with NiSi.
The new method also offers a cost-effective solution, since implantation of fluorine ion can be done with current manufacturing equipment and produces no adverse side effects in the manufacturing process, such as sharp increase of sheet resistance.
As lower power consumption while delivering greater performance is a prerequisite for advanced MOS transistors, especially process technology at 45nm and beyond, Toshiba plans to incorporate the new method into its 45nm LSI fabrication process.
Full details of the new technology were presented at the IEDM 2004 in San Francisco.
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