Product category:
Microprocessors, Microcontrollers and DSPs
News Release from: Toshiba Electronics Europe | Subject: TC90400
Edited by the Electronicstalk Editorial
Team on 16 May 2005
SoC shows off digital terrestrial TV
capabilities
Toshiba Electronics Europe used last week's Mediacast 2005 to provide visitors with live demonstrations of the company's first single-chip pan-European DTT implementation.
Toshiba Electronics Europe used last week's Mediacast 2005 to provide visitors with live demonstrations of the company's first single-chip pan-European DTT (digital terrestrial television) implementation The demonstration used the Cabot Communications Aurora pre-integrated DVB middleware stack to illustrate how a highly integrated, high performance system-on-chip platform can significantly reduce the component count, cost and time-to-market of MHEG-5-enabled products
This article was originally published on Electronicstalk on 2 Jun 2004 at 8.00am (UK)
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MHEG-5 compliant systems will, for instance, support applications such as Internet digital TV, (near) video on demand services, home shopping and interactive advertising, home banking and e-commerce, and online gaming.
In addition, MHEG-5 can provide the opportunity to improve on-screen information and functionality through electronic programming guides (EPGs), animated graphics, interactive "hot spots", picture-in-picture capabilities and digital multimedia teletext services.
Toshiba's live DTT demonstration, including MHEG-5 applications, was created by implementing the Cabot Aurora DVB middleware stack onto Toshiba's TC90400 high performance, highly integrated digital TV IC.
Codenamed Donau, this IC combines Toshiba's media embedded processor (MeP) architecture with a powerful 64bit embedded RISC host processor to create a multimedia SoC device with compute performances of up to 650MIPS (at 180MHz).
The MeP architecture effectively frees the host processor from compute-intensive DVB and multimedia processing tasks and allows designers to choose cost-optimised solutions for Digital Video Broadcast (DVB) applications such as MHEG-5.
Aurora is the first complete, turnkey open standards-based DVB middleware stack for free-to-air digital terrestrial and satellite receivers.
The pre-integrated stack can be configured to meet the unique market requirements of any country.
As a result, manufacturers no longer need to invest time or money in the development of multiple model variants.
Instead, they can concentrate efforts on differentiating features such as the design, user interface and interactive services to quickly bring to market competitive devices that meet the increasing demand for digital TV.
In the Toshiba implementation, the Aurora stack sits above a Linux DVB4.0 API and DirectFB graphics library.
The Linux DVB API defines the application front-end including tuner and DVB demodulator, control for external hardware, a demultiplexer that filters the incoming DVB stream, and MPEG2 audio and video decoding.
DirectFB is a powerful and scalable library that provides hardware graphics acceleration, input device handling and abstraction, an integrated windowing system with support for translucent windows and multiple display layers on top of the Linux frame buffer device.
Thomas Kuschel, Toshiba Electronics Europe's Senior Manager for Microcomputer, Automotive and Consumer IC Marketing, states: "Performance, integration, low component count and rapid time to market are key issues for device manufacturers developing MHEG-5-enabled products".
"Our demonstration shows it is possible to address these requirements using a single device and a middleware stack that can be tailored to a wide variety of specific, regional requirements".
Darren Standing, Business Development Manager at Cabot Communications, adds: "Manufacturers face increasing pressure to cut their bill of material costs to protect margins in a highly aggressive market".
"By integrating Aurora with Toshiba's TC90400 to create a reference platform, manufacturers can quickly and cost-effectively create and design a range of digital TV products with pan-European DTT functionality".
Based around the Toshiba TX49 64bit RISC processor core operating at up to 180MHz, the Donau IC used in the MHEG-5 demonstration supports a unified memory system as well as NAND and/or NOR Flash memory to keep system costs to a minimum.
The core is integrated with MeP modules that deliver digital media capabilities including dual-stream MPEG-2 video decoding, advanced audio processing allowing three stream audio decoding, program stream and transport stream processing, and a powerful multiplane graphics engine with hardware accelerator.
Onboard interfaces and peripherals include 8 and 16bit ITU-601/656 inputs, two DVB common interfaces, two smartcard interfaces, IDE connectivity, a USB 1.1 host controller, and external 8 and 16bit bus interfaces.
The IC also offers 32 PIO channels (pin shared), two I2C bus connections, four serial I/Os, two PWM channels, IR decoding, an RTC (real time clock), and three 24bit up-counter timers.
The processing, peripheral and interface functionality offered by Toshiba's DTV IC allows for direct connection of single- or dual-tuner digital tuner input, 4:2:2 video input, and DVD drives, hard disk drives and CD drives.
Up to 64Mbyte of Flash and between 8 and 64Mbyte of DDR-SDRAM can also be interfaced to the ICs.
Output capabilities include analogue video (CVBS, S-Video), 2 x 4:2:2 video, and RGB output.
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