Product category:
Microprocessors, Microcontrollers and DSPs
News Release from: Toshiba Electronics Europe | Subject: TMPA910CRAXBG
Edited by the Electronicstalk Editorial
Team on 03 March 2008
Novel bus structure accelerates 32bit
MPU
Low-power ARM-based microprocessor will considerably reduce the development time and component count of applications requiring basic multimedia functionality.
Toshiba Electronics Europe has launched a low-power ARM-based microprocessor that combines a high-performance 32bit core with comprehensive graphics control and processing functionality and a variety of onboard connectivity and peripheral options The new device will considerably reduce the development time and component count of applications requiring basic multimedia functionality
This article was originally published on Electronicstalk on 8 Nov 2004 at 8.00am (UK)
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Based on the ARM926EJ-S CPU core operating at up to 200MHz, the new TMPA910CRAXBG uses a seven-layer multiple-bus architecture.
This architecture significantly improves performance compared with other devices operating at similar processor speeds.
The built-in LCD controller offers support for TFT and STN display sizes up to 1024 x 1024 pixel.
An LCD data processor accelerator delivers image scaling, filtering and blending functions and offers real time processing for movies at speeds up to 30 frames per second.
The new TMPA910CRAXBG has a CMOS image sensor interface that simplifies the implementation of applications requiring image capture.
A touchscreen interface further reduces the need for external components in man machine interface (MMI) designs.
Additional connectivity includes SPI, UART, I2C, I2S and a high-speed USB device (480Mbit/s).
Toshiba has incorporated 56Kbyte of built-in embedded RAM for program, data and display memory, boot ROM, and a memory controller that supports SDR and DDR SDRAM.
Up to 2.5Gbyte of linear access space can be addressed.
An SD host controller supports high-speed mode SD cards with capacities up to 32Gbyte.
The new microprocessor is supplied in a 361-pin FPGA package.
Additional built-in peripherals include a 10bit ADC, a six-channel, 16bit timer, a watchdog timer, real time clock and alarm functionality.
In addition to extensive software support that includes graphics libraries and embedded operating systems, the new device is supported through the availability of a starter kit that will further speed application development and prototyping.
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