Relationship extends to IP advantage

ARM and Taiwan Semiconductor Manufacturing Company have agreed to extend the companies' long-term relationship for development of a new suite of ARM Advantage products.

ARM and Taiwan Semiconductor Manufacturing Company have agreed to extend the companies' long-term relationship for development of a new suite of ARM Advantage products, part of its family of Artisan physical IP, in support of TSMC's 65 and 45nm G processes.

The agreement provides customer access to these ARM Advantage products on TSMC's leading-edge technology through the ARM Access Library Programme.

"With this agreement, ARM and TSMC have laid the foundation for the future of highly advanced technology access to the global design community; together, we are committed to providing a seamless design-to-silicon path for customers", said Neal Carney, Vice President of Marketing, Physical IP, ARM.

"The combination of the comprehensive suite of ARM Advantage IP and TSMC's most advanced manufacturing technologies offers leading-edge solutions that address SoC designers' performance and power management requirements".

"TSMC customers are already enjoying the benefits of TSMC's advanced 65nm technologies".

"As more designers migrate to this technology, the requirement for highly integrated but easy-to-use IP becomes increasingly important", said Ed Wan, Senior Director of Design Service Marketing for TSMC.

"With the ARM Access Library Programme, designers can realise high value, low risk and a much easier adoption path".

ARM Advantage IP provides high-speed, low-power performance to meet a wide range of applications in consumer, communications and networking markets.

The Advantage standard cells include power management kits that enable dynamic and leakage power saving techniques such as clock gating, multiple-voltage islands and power gating.

Five Advantage memory compilers are offered with similar advanced power saving features.

The suite of products is characterised for timing and power over an extended range of voltages, enabling designers to perform accurate simulation of multiple-voltage designs.

Additionally, ARM will distribute TSMC Nexsys I/O products for a complete offering of physical IP.

The Advantage IP includes ARM's extensive set of views and models providing integration with many of the industry's leading electronic design automation (EDA) tools.

These views provide functional, timing and power information for the Advantage products over a wide range of operating conditions, allowing designers to implement complex power management systems that actively control dynamic and leakage power within their SoC.

TSMC's 65nm success builds on the company's industry leading 0.13um and 90nm track records.

TSMC estimates that the 65nm production will ramp in 2006.

The company will also launch 65nm prototyping shuttles every other month, enabling customers and EDA, IP and library suppliers to prototype and qualify their leading-edge designs.

TSMC's 65nm Nexsys technology is the company's third-generation semiconductor process employing both copper interconnects and low-k dielectrics.

It is a nine-layer metal process with core voltages of 1.0 or 1.2V, and I/O voltages of 1.8, 2.5 or 3.3V.

The new process technology offering supports a standard cell gate density twice that of TSMC's Nexsys 90nm Nexsys process.

It also features with very competitive 6T SRAM and 1T embedded DRAM memory cell sizes.

In addition, this technology offering also includes mixed signal and radio frequency functionality to support analogue and wireless design, embedded high density memory to support integration of logic and memory, and an electrical fuse option to support customer encryption needs.

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