Low-power process suits ZigBee/Wibree devices

Taiwan Semiconductor ManufacturingCompany's 0.13-micron embedded Flash process employs the same split-gate Flash cell as the previous generation, enabling easy migration.

Taiwan Semiconductor Manufacturing Company has qualified its 0.13-micron embedded Flash process and has entered production.

TSMC is the first pure-play foundry to launch production of a fully logic compatible 0.13-micron process featuring embedded Flash technology.

The 0.13-micron embedded Flash process employs the same split-gate Flash cell as the previous generation, enabling easy migration.

It is fully compatible with TSMC's logic baseline of 0.13-micron general-purpose process (G) and low power process (LP).

Such compatibility ensures that customers get the best out of their investment in libraries and silicon intellectual property (IP).

This is particularly beneficial when a customer is interested in new product development with embedded Flash function or strengthening cost performance of an existing product by having Flash memory embedded.

Compatibility also signals that copper wiring comes into play for TSMC's embedded Flash process starting with this 0.13-micron node.

"Technology savvy factors in our smooth introduction of copper wiring into the embedded Flash process".

"The production launch signatures another milestone achieved in our history of nonvolatile memory (NVM) technology development", said Sam Chen, Director of Memory Platform Marketing at TSMC.

"The process' low-power transistor makes it ideal for ZigBee/Wibree devices, wireless headsets, hearing aids, SmartCards and other applications requiring ultra low power consumption ranging from 1.2V to 1.5V", Sam added.

"And the value of this process can be further enhanced by TSMC's comprehensive and cost-effective embedded Flash IP testing support".

Customers have expressed their concern over substantial costs associated with embedded Flash IP testing.

TSMC has tackled the issue with a "design for test (DFT)" module that maximises the numbers of die tested in one single test.

Designers can choose either multiplexing (MUX) or a serial scheme depending on their need for ease of implementation or low pin count.

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