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True Circuits

Address:
4962 El Camino Real
Suite 206
Los Altos
CA 94022
USA
Telephone: (USA) +1 650 691-2500

http://www.truecircuits.com

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Listing of all 9 news releases from True Circuits:

Line of 65nm timing IP planned for 2007

True Circuits has announced a new line of silicon-proven TSMC 65nm phase-locked loop (PLL) and delay-locked loop (DLL) hard macros targeting high-speed timing applications.

News from True Circuits ( 6 December 2006)

Soft modem chip integrates many PLLs

 User application article   Multiple PLL hard macros have been used by fabless semiconductor company Icera in the Livanto ICE8020 wireless soft modem IC for 3G mobile phone and wireless devices.

News from True Circuits (25 April 2006)

PLL hard macros save die space

A new line of phase-locked loop (PLL) hard macros from True Circuits occupy just one-third the die size of the company's current standard PLL products.

News from True Circuits (13 July 2004)

Wireless network processor applies multiple PLLs

 User application article   Ubicom has successfully implemented multiple True Circuits PLL hard macros in its IP3023T wireless network processor using TSMC's 130nm process technology.

News from True Circuits (23 March 2004)

Low-jitter hard macro wins key timing spot

 User application article   Parama Networks has implemented a True Circuits clock generator PLL as the primary clocking macro in its new ADM-on-a-Chip, fabricated in UMC's 130nm process technology.

News from True Circuits (23 January 2004)

PLL aids high-speed interface

 User application article   NEC Electronics has implemented a True Circuits clock generator PLL in a new SPI-4.2 interface hard macro fabricated in NEC's 130nm process technology.

News from True Circuits (31 October 2003)

Low-jitter DLL macros target DDR interfaces

A new line of delay-locked loop analogue hard macros is aimed at high-speed, DDR-style interface applications.

News from True Circuits (15 October 2003)

Phase locked loop IP cuts down jitter

True Circuits has developed a line of spread-spectrum and low-bandwidth phase-locked loop analogue hard macros with LockNow! technology.

News from True Circuits (14 May 2003)

PLL IP aids digital TV SoC

 User application article   The TeraLogic Group of Oak Technology is to use low-jitter PLL intellectual property from True Circuits in its Generation9 SoC, one of the industry's most advanced digital TV solutions.

News from True Circuits (19 November 2002)

 

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