IP embeds bus trace analyser

Instrumentation IP is specifically focused on the debugging of embedded systems.

Temento Systems has announced some major innovations around its new release of DiaLite Platform Edition.

Most applications developed today embed synthesisable processors into FPGAs that can be quickly customised, integrated, prototyped and then moved into production.

During the debugging phase, these complex systems on chip (SoC) designs pose challenging problems, and one of the challenges is the analysis of the information at the embedded bus level.

Because visibility cannot be addressed by traditional test methods, Temento Systems has launched a new line of instrumentation IP specifically focused on the debugging of embedded systems with the introduction of a bus trace analyser for Amba and ARM processor-based SoCs.

"The performance of this IP achieving very high data compression rate coupled with TemStorage, our external high capacity storage memory, compose a new consistent debugging solution", said Patrice Deroux-Dauphin, CEO of Temento Systems.

"In its permanent willingness for cutting debug time, Temento Systems now delivers DiaLite productivity to ARM systems designers and rationally answers their challenge of getting faster to the market".

To enable developers to get their ARM powered products to market faster, Temento Systems has joined the ARM Connected Community, the industry's largest ecosystem of ARM technology-based products and services.

DiaLite Platform Edition Revision 4.7 comes with a more powerful range of instrumentation IPs leveraging system verification running on chip and at design speed.

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