Product category:
Analogue and Mixed Signal ICs
News Release from: Texas Instruments (April 2006-) | Subject: SN74SSTE32882
Edited by the Electronicstalk Editorial
Team on 10 November 2006
Register and PLL combo enables DDR3
modules
Texas Instruments (TI) has introduced the industry's first fully integrated register and phase-locked loop (PLL) for DDR3 registered dual inline memory modules (RDIMMs).
Texas Instruments (TI) has introduced the industry's first fully integrated register and phase-locked loop (PLL) for DDR3 registered dual inline memory modules (RDIMMs) This single-chip device supports high datarates of 800 to 1066Mtransfer/s
This article was originally published on Electronicstalk on 4 Apr 2006 at 8.00am (UK)
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The device also reduces power consumption and board space to simplify the design of next-generation DDR3 memory modules for servers and workstations.
Manufactured in TI's 130nm process technology, the SN74SSTE32882 also integrates a high-performance, low-skew buffer with the register and low-jitter PLL.
Integration of the PLL eliminates the need to tune the memory module, greatly simplifying design and board layout to accelerate server and RDIMM manufacturers' market entry.
Customers can also enjoy improved performance and reliability with the integration of these features.
The SN74SSTE32882 28bit 1:2 configurable registered buffer is designed for 1.5V VDD operation for high speed and low power consumption.
One device per DIMM is required to drive up to 36 SDRAM loads.
The edge-controlled circuit outputs meet SSTL-15 specifications and are optimised for terminated DIMM loads.
To provide maximum flexibility and support industry-standard DIMM configurations, the clock and control outputs can be programmed with differing drive strengths.
The SN74SSTE32882 fully supports parity features as defined by Joint Electron Device Engineering Council (JEDEC).
This parity function improves reliability of server systems.
The SN74SSTE32882 also supports spread spectrum clocking (SSC) to reduce EMI.
"The SN74SSTE32882 is the first device on the market enabling the future of cost- and power-efficient registered DIMMs for next generation servers and high-end PCs", said Kent Novak, General Manager of TI's high-speed communications group.
"This device is a result of TI's analogue technology leadership and co-operation with industry-leading chipset vendors, server OEMs and DIMM manufacturers".
The SN74SSTE32882 is packaged in a 176-pin BGA with 0.65mm ball pitch.
It is sampling today and will be in full production in Q3 2007.
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