Processor model aims to unite design flow
The 1-Source initiative aims to unify the embedded system design flow.
Vast has launched the 1-Source initiative in an effort to unify the embedded system design flow.
1-Source unifies the flow with a single standards-compliant, high-speed, cycle-accurate virtual processor model integrated with a series of standards-based virtual system prototyping technologies and third-party tool interfaces.
A major barrier to the adoption of virtual system prototypes (VSPs) has been the difficulty and complexity of making them work in the larger design flow.
One root cause of complexity is the large number of processor model abstraction types, each with different timing, performance and functionality characteristics.
Processor model abstraction types include programmers view (PV), programmers view with timing (PVT) and cycle-accurate view (CA).
Thus, a design having three unique cores would require development and maintenance of an overwhelming nine processor models - plus the numerous transaction interfaces required to handle communication between the different types of models.
The 1-Source initiative solves this complexity problem with one processor model (1-Source) satisfying performance and accuracy requirements, coupled with a series of innovative standards-based technologies and third-party tool interfaces.
The 1-Source initiative is defined by six major deliverables.
High-speed, cycle-accurate processor modelling technology enables a single 1-Source model to deliver accuracy and performance superior to the hybrid PV, PVT, CA approach.
The same 1-Source model can be used for architecture, software, and hardware development.
Secondly, native OSCI 1666 SystemC support enables standards-based interoperability and high performance simulation.
Thirdly, standards-based communication model support allows high performance simulations using protocol-agnostic transaction models such as OCP-IP TL2 and Greensocs/Greenbus.
Vast is an active member of both organisations and has significant experience and intellectual property in this area.
Fourthly, third-party tools interfaces allow customers to use virtual system prototypes with proprietary and third-party models and tools (such as The Mathworks Simulink and HDL models) and third party simulators.
Fifthly, open platform export to other SystemC simulators allows customers to package and ship platforms created with Vast tools to their customers who may use other SystemC tools.
And finally, deploying Vast's innovative, high speed and cycle-accurate processor modelling technology to processor intellectual property (IP) companies allows them to create and deploy 1-Source virtual processor models.
"The 1-Source initiative defines a new standards-based performance point for virtual system prototyping solutions".
"As a result of working closely with architects, hardware and software designers on leading embedded system design projects, the elements of 1-Source are forged from real customer design activity", said Jeff Roane, Director of Marketing at Vast.
"We are deeply committed to furthering the productivity of our customers through compliance to standards and opening our modelling and simulation technology to users".
"The marketplace will continue to see a series of actions from Vast that support the 1-Source initiative", commented Alain Labat, Vast President and CEO.
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