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    <title>RSS News Feed for Verific Design Automation - from Electronicstalk</title>
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    <description>Verific Design Automation news releases on Electronicstalk</description>
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    <copyright>Copyright (C)2008 Pro-Talk Ltd. All rights reserved.</copyright>
    <pubDate>Sat, 22 Nov 2008 08:00:00 UT</pubDate>
    <lastBuildDate>Sat, 22 Nov 2008 08:00:00 UT</lastBuildDate>
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    <item>
      <title>ProDesign signs for software support</title>
      <description>Verific Design Automation has licensed its HDL Component Software to ProDesign, a leading supplier of high-speed ASIC and SoC verification platforms.</description>
      <pubDate>Wed, 29 Mar 2006 08:00:00 UT</pubDate>
      <category>Verific Design Automation</category>
      <link>http://www.electronicstalk.com/news/vef/vef104.html</link>
    </item>
    <item>
      <title>Software expands scope of FPGA prototyping</title>
      <description>Altium is using Verific Design Automation's HDL Component Software in Nexar, the industry's first comprehensive, vendor-independent solution for embedded system-level design on an FPGA platform.</description>
      <pubDate>Fri, 22 Apr 2005 08:00:00 UT</pubDate>
      <category>Verific Design Automation</category>
      <link>http://www.electronicstalk.com/news/vef/vef103.html</link>
    </item>
    <item>
      <title>Interface links HDL with OpenAccess</title>
      <description>Verific Design Automation has developed an interface between its hardware description language (HDL) Component Software and the OpenAccess database.</description>
      <pubDate>Thu, 10 Mar 2005 08:00:00 UT</pubDate>
      <category>Verific Design Automation</category>
      <link>http://www.electronicstalk.com/news/vef/vef101.html</link>
    </item>
    <item>
      <title>Silicon Navigator signs up for HDL</title>
      <description>Silicon Navigator Corp has licensed its hardware description language (HDL) Component Software from Verific Design Automation.</description>
      <pubDate>Thu, 10 Mar 2005 08:00:00 UT</pubDate>
      <category>Verific Design Automation</category>
      <link>http://www.electronicstalk.com/news/vef/vef102.html</link>
    </item>
    <item>
      <title>Parser brings SystemVerilog to mainstream EDA</title>
      <description>Verific Design Automation is shipping the first commercially available SystemVerilog parser.</description>
      <pubDate>Tue, 30 Nov 2004 08:00:00 UT</pubDate>
      <category>Verific Design Automation</category>
      <link>http://www.electronicstalk.com/news/vef/vef100.html</link>
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