<?xml version="1.0" encoding="iso-8859-1"?>
<rss version="2.0">
  <channel>
    <title>RSS News Feed for Verplex Systems - from Electronicstalk</title>
    <link>http://www.electronicstalk.com/news/ver/ver000.html</link>
    <description>Verplex Systems news releases on Electronicstalk</description>
    <language>en-gb</language>
    <copyright>Copyright (C)2008 Pro-Talk Ltd. All rights reserved.</copyright>
    <pubDate>Sat, 22 Nov 2008 08:00:00 UT</pubDate>
    <lastBuildDate>Sat, 22 Nov 2008 08:00:00 UT</lastBuildDate>
    <image>
      <title>Pro-Talk Ltd</title>
      <url>http://www.pro-talk.com/images/protalklogo90.gif</url>
      <link>http://www.pro-talk.com/</link>
      <width>90</width>
      <height>79</height>
    </image>
    <item>
      <title>Full SoC coverage from formal verification upgrade</title>
      <description>The latest release of Conformal provides a comprehensive solution that enables SoC designers and verification engineers to deliver functional bug-free silicon.</description>
      <pubDate>Thu, 31 Jul 2003 08:00:00 UT</pubDate>
      <category>Verplex Systems</category>
      <link>http://www.electronicstalk.com/news/ver/ver115.html</link>
    </item>
    <item>
      <title>Logic equivalence checker speeds verification</title>
      <description>FMC SOTA Design Technology of Hsinchu, Taiwan, has adopted formal verification software from Verplex Systems and has used it successfully throughout its design flow on a variety of complex IC designs.</description>
      <pubDate>Mon, 14 Jul 2003 08:00:00 UT</pubDate>
      <category>Verplex Systems</category>
      <link>http://www.electronicstalk.com/news/ver/ver114.html</link>
    </item>
    <item>
      <title>Verification extends to complex datapaths</title>
      <description>To answer the challenge of formally verifying designs that have compiled datapath circuitry, Verplex Systems has developed Conformal Datapath (DP).</description>
      <pubDate>Fri, 25 Apr 2003 08:00:00 UT</pubDate>
      <category>Verplex Systems</category>
      <link>http://www.electronicstalk.com/news/ver/ver113.html</link>
    </item>
    <item>
      <title>Equivalence checking for embedded memories</title>
      <description>Conformal MEM is the first equivalence checking solution for embedded memories.</description>
      <pubDate>Mon, 17 Feb 2003 08:00:00 UT</pubDate>
      <category>Verplex Systems</category>
      <link>http://www.electronicstalk.com/news/ver/ver112.html</link>
    </item>
    <item>
      <title>Educational site covers formal verification</title>
      <description>Verplex Systems has launched an online educational website for designers and verification engineers.</description>
      <pubDate>Tue, 01 Oct 2002 08:00:00 UT</pubDate>
      <category>Verplex Systems</category>
      <link>http://www.electronicstalk.com/news/ver/ver111.html</link>
    </item>
    <item>
      <title>Verification seminar comes to Munich</title>
      <description>The Verify 2002 committee has chosen Munich, Germany, as the location for this year's European seminar.</description>
      <pubDate>Tue, 24 Sep 2002 08:00:00 UT</pubDate>
      <category>Verplex Systems</category>
      <link>http://www.electronicstalk.com/news/ver/ver110.html</link>
    </item>
    <item>
      <title>French award for logic equivalence checker</title>
      <description>Verplex Systems has won the Electron d'Or award in France for EDA tool of 2002 for its Conformal logic equivalence checker (LEC).</description>
      <pubDate>Fri, 12 Jul 2002 08:00:00 UT</pubDate>
      <category>Verplex Systems</category>
      <link>http://www.electronicstalk.com/news/ver/ver109.html</link>
    </item>
    <item>
      <title>Verplex is top dog in formal verification</title>
      <description>Verplex reckons it has taken top spot in the market for formal verification tools.</description>
      <pubDate>Fri, 14 Jun 2002 08:00:00 UT</pubDate>
      <category>Verplex Systems</category>
      <link>http://www.electronicstalk.com/news/ver/ver108.html</link>
    </item>
    <item>
      <title>Verification gets physical with complete SoC flow</title>
      <description>Verplex Systems has made significant changes to its products to extend its market into the physical domain.</description>
      <pubDate>Fri, 17 May 2002 08:00:00 UT</pubDate>
      <category>Verplex Systems</category>
      <link>http://www.electronicstalk.com/news/ver/ver107.html</link>
    </item>
    <item>
      <title>Verplex throws its hat into Accelera ring</title>
      <description>Verplex Systems has added its support for the formal property language selected by the Accellera Formal Verification Technical Committee.</description>
      <pubDate>Thu, 09 May 2002 08:00:00 UT</pubDate>
      <category>Verplex Systems</category>
      <link>http://www.electronicstalk.com/news/ver/ver106.html</link>
    </item>
    <item>
      <title>Verification library supports VHDL</title>
      <description>Verplex Systems has expanded its Open Verification Library (OVL) to include support for the VHSIC hardware description language (VHDL).</description>
      <pubDate>Wed, 20 Mar 2002 08:00:00 UT</pubDate>
      <category>Verplex Systems</category>
      <link>http://www.electronicstalk.com/news/ver/ver105.html</link>
    </item>
    <item>
      <title>Verification for high-density FPGAs</title>
      <description>Verplex Systems and Xilinx have launched one of the first formal verification environments specifically for the design of high-density FPGAs.</description>
      <pubDate>Wed, 26 Sep 2001 08:00:00 UT</pubDate>
      <category>Verplex Systems</category>
      <link>http://www.electronicstalk.com/news/ver/ver104.html</link>
    </item>
    <item>
      <title>Formal verification just got faster</title>
      <description>Verplex Systems has announced its next generation Conformal Logic Equivalence Checker.</description>
      <pubDate>Tue, 18 Sep 2001 08:00:00 UT</pubDate>
      <category>Verplex Systems</category>
      <link>http://www.electronicstalk.com/news/ver/ver103.html</link>
    </item>
    <item>
      <title>Verplex seeks acceptance for OVL library</title>
      <description>Verplex Systems has contributed its Open Verification Language (OVL) library to electronics industry standards organisation Accellera.</description>
      <pubDate>Thu, 14 Jun 2001 08:00:00 UT</pubDate>
      <category>Verplex Systems</category>
      <link>http://www.electronicstalk.com/news/ver/ver102.html</link>
    </item>
    <item>
      <title>Functional checker intercepts SoC bugs early</title>
      <description>BlackTie functional checker from Verplex Systems is the industry's first full-chip multi-million-gate-capacity tool to accelerate the verification of SoC designs.</description>
      <pubDate>Fri, 23 Mar 2001 08:00:00 UT</pubDate>
      <category>Verplex Systems</category>
      <link>http://www.electronicstalk.com/news/ver/ver100.html</link>
    </item>
    <item>
      <title>Verplex Systems set up in Europe</title>
      <description>Verplex Systems has established European headquarters in Grenoble, France, and plans to open satellite offices in the UK, Germany, Sweden and Israel before the end of the year.</description>
      <pubDate>Fri, 23 Mar 2001 08:00:00 UT</pubDate>
      <category>Verplex Systems</category>
      <link>http://www.electronicstalk.com/news/ver/ver101.html</link>
    </item>
  </channel>
</rss>
