TSMC lends library support to SoC design efforts
TSMC and Virage Logic have signed a distribution and support agreement that will provide designers with highly integrated library support and services for SoC design.
Taiwan Semiconductor Manufacturing Company and Virage Logic have signed a distribution and support agreement that will provide designers with highly integrated library support and services for SoC design.
The new development kicks off a significant expansion of both companies' services, as well as a new model for distributing TSMC's internally developed process-tuned standard cell and I/O libraries.
The new agreement enhances an ongoing relationship between the two companies.
Under terms of the agreement, Virage Logic will distribute and support TSMC's advanced 150, 130 and Nexsys 90nm standard cell and I/O libraries either alone or integrated with its own ASAP memory or Star memory system embedded memory products.
In addition, Virage Logic will continue in parallel to sell and support its own TSMC process-specific libraries, including ASAP logic metal programmable cell and standard cell libraries, which are differentiated from the TSMC standard cell library in market focus and architecture.
TSMC's 150, 130 and Nexsys 90nm standard cell and I/O libraries are designed to enhance manufacturability through process tuning and close integration with all major electronic design automation (EDA) tools.
The Nexsys 90nm libraries also include enhanced features that enable SoC design, such as dual-threshold power tuning that enables designers to integrate high-speed and low-leakage functionality on the same chip at the same time.
"TSMC's Design Service Division has been developing process-tuned libraries for both internal and external use almost since the company's inception", said Dr Genda Hu, Vice President of Corporate Marketing at TSMC.
"This agreement now gives SoC developers access to integrated libraries through a partner who is engaged with them at the crucial circuit and device design level.
As a committed library alliance partner and long time distributor of its own libraries targeted to TSMC's process technologies, Virage Logic is the ideal partner with which to kick off this new programme".
Virage Logic is focused on delivering semiconductor IP platforms that are designed for manufacturability.
Adding TSMC process-tuned standard cell and I/O libraries to Virage Logic's existing portfolio of TSMC-9000 compliant memory compilers and logic products greatly enhances a SoC designer's ability to achieve their budget and schedule goals.
All of the Virage Logic IP components including the TSMC libraries are complemented by the industry-leading Virage Logic customer support team.
"Our strategy is to provide highly reliable IP to meet the demanding specifications of SoC designs", said Adam Kablanian, CEO and President, Virage Logic.
"To do that, we deliver application-optimised semiconductor IP platforms that are built on advanced technology in both the memory and logic arenas.
By distributing TSMC's standard cell libraries, we provide designers with more choices, greater flexibility and, most importantly, faster time to volume".
TSMC's libraries are developed using the rigorous TSMC Library 9000 verification procedure, the industry benchmark for library product quality, reliability and completeness.
Without these predefined and verified libraries, chip designers would have to employ custom design techniques requiring huge resource outlays to both build and verify similar elements.
Pricing and Availability TSMC's standard cell and I/O libraries are available now from Virage Logic at no cost to the user.
Standard charges apply for Virage Logic's embedded memories and logic IP.
Support charges apply to all products.
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