Logic IP family takes to the Galaxy

Edited by the Electronicstalk editorial team Mar 28, 2003

In an effort to better serve advanced SoC designers, Virage Logic Corp has integrated its silicon-proven product family with the Synopsys Galaxy design platform.

In an effort to better serve advanced SoC designers, Virage Logic Corp has integrated its silicon-proven product family with the Synopsys Galaxy design platform.

With the availability of Virage Logic's innovative products working in Synopsys' design implementation product environment, the companies' large common customer bases will be able to reduce design production costs without having to change their existing design flow.

"Synopsys has worked together with Virage Logic to develop high-quality views and support for Galaxy design platform", said Kevin Kranen, Director of Strategic Programmes at Synopsys.

"Our joint customers will benefit from this collaboration in the form of a smoother, more convergent implementation flow from RTL to production leveraging Virage Logic's silicon-proven IP".

As designers move to smaller geometries, there are critical requirements such as reducing costs while also boosting performance and getting to volume production quickly and efficiently.

The Area, Speed and Power (ASAP) Logic product line offers standard cell and metal programmable cell libraries.

The ASAP standard cell libraries reduce design costs by improving the area by up to 20%.

In addition, the ASAP Metal Programmable Cell libraries reduce mask costs by up to 70%, and reduce the amount of time it takes for a design respin.

"We worked closely with Synopsys to develop our ASAP Logic libraries for the Galaxy design platform and Liberty library formats to help ensure that our customers do not have to change their existing design methodology, and that they'll have a single, open integrated platform", said Brani Buric, Senior Director of Product Marketing, Virage Logic.

"With over 2500 designs in volume production, the ASAP Logic patented architecture significantly reduces mask and silicon costs without sacrificing speed or power".