Product category:
Intellectual Property Cores
News Release from: Virage Logic | Subject: Embedded memory IP
Edited by the Electronicstalk Editorial
Team on 29 April 2003
Embedded memory IP shrinks to 90nm
process
Virage Logic has extended its embedded memory IP to TSMC's Nexsys 90nm process technology.
Virage Logic has extended its embedded memory IP to TSMC's Nexsys 90nm process technology As the first semiconductor IP company to provide silicon-proven memories on TSMC's Nexsys 90nm generic process, SoC designers can now conduct comparisons of area, speed and power between 130 and 90nm to enable designs starts today and not miss time-to-market pressures
This article was originally published on Electronicstalk on 22 Oct 2002 at 8.00am (UK)
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Based on TSMC's Nexsys 90nm process technology, Virage Logic's embedded memory technology is designed to enhance manufacturability through process tuning and close integration with all major EDA tools.
"Because of Virage Logic's silicon-proven IP technology portfolio, Agere's customers can get complex products to market faster", said Jon Fields, Vice President of Design Platforms, Agere Systems.
"This faster product delivery is vital for Agere's designs, which are targeted for communications markets.
By combining Virage Logic's high-performance embedded memory technology with TSMC's Nexsys 90nm process technology, we've been able to provide our customers with the increased bandwidth and functionality that their applications require, while keeping power consumption and system costs low".
As part of its quality assurance efforts, Virage Logic's FirstPass silicon characterisation programme assures SoC designers that the IP is reliable, manufacturable and will perform to specification.
Virage Logic has completed its testing on TSMC's 90nm process.
The results are available to customers in an extensive silicon characterisation report.
Key validation tests performed included: crossfunctionality, failure analysis, minimum/maximum operating voltage range, standby current, operating current, access time, clock skew shmoo, and data retention testing.
A copy of the report is available from Virage Logic.
Combined with the TSMC-9000 verification procedure, Virage Logic's FirstPass silicon characterisation programme provides an industry benchmark in quality, reliability and completeness.
"We are committed to providing our customers with best-in-class semiconductor IP platforms that enable them to meet their quality and yield requirements", said Adam Kablanian, CEO and President, Virage Logic.
"By leveraging TSMC's advanced 90nm process with our IP, we can deliver the high performance requirements that customers need to build their next generation designs".
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