Product category:
Intellectual Property Cores
News Release from: Virage Logic | Subject: Technology-Optimised Platforms
Edited by the Electronicstalk Editorial
Team on 19 May 2003
Platforms boost Agilent ASIC offerings
Agilent Technologies has supplemented its internally developed memory, logic and I/O offerings by licensing Virage Logic's Technology-Optimised Platforms.
Agilent Technologies has supplemented its internally developed memory, logic, and I/O offerings by licensing Virage Logic's Technology-Optimised Platforms The license agreement spans 180, 130 and 90nm processes for the major third-party foundries
This article was originally published on Electronicstalk on 28 May 2003 at 8.00am (UK)
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Technology-optimised platforms on show at DAC
Virage Logic will demonstrate the key benefits of its newly announced technology-optimised platforms at this year's Design Automation Conference in Anaheim, California.
Logic libraries cut silicon costs
Long known in the embedded memory market, Virage Logic is extending its role to the broader category of semiconductor IP platforms with its first foray into logic components.
Virage Logic's Technology-Optimised Platform met Agilent's stringent requirements for its high-volume, high-density and high-performance ASIC and SoC applications.
"With increased process and design complexity and shorter design cycles, we need pretested and ready-to-use IP that is interoperable and designed for manufacturability", said James Stewart, Vice President and General Manager of Agilent's ASIC Products Division.
"With Virage Logic's proven technology offered in a complete IP platform, we have a partner that provides us with the flexibility for a wide range of applications".
Further reading
Metal programmable cells join RapidChip platform
LSI Logic has licensed ASAP metal programmable cells from Virage Logic for use in its RapidChip silicon platform.
TSMC lends library support to SoC design efforts
TSMC and Virage Logic have signed a distribution and support agreement that will provide designers with highly integrated library support and services for SoC design.
"Our customers know that they can depend on us to deliver fully tested and validated IP.
We work very closely with the foundries to achieve high manufacturing yields, which enables our customers to dramatically cut silicon and system costs", said Adam Kablanian, CEO and President, Virage Logic.
"With our Technology-Optimised Platforms, we are able to address Agilent's specific characteristics and requirements for their market segments.
Regardless of the application, the platform provides a customised portfolio grounded in advanced technology that's designed to meet current and future design challenges".
Building on its technology and market leadership position, Virage Logic's Technology-Optimised Platforms aim to meet the critical requirements of reducing silicon costs and failure risks, while boosting performance and ensuring high manufacturing yields for a particular foundry or IDM process.
By providing silicon-proven, integrated IP that is compatible with all the major EDA flows, Virage Logic's Technology-Optimised Platforms address the needs of complex and mainstream SoC designs.
Virage Logic's Technology-Optimised Platforms are based on its highly differentiated IP including the Self-Test and Repair (STAR) Memory System, the Area, Speed and Power (ASAP) Memory product line, the ASAP Logic product line with its metal programmable and standard cell libraries, and the recently introduced Base I/O libraries.
Technology-Optimised Platforms enable customers to expedite the creation of next generation products by addressing the increasingly complex task of identifying and obtaining the semiconductor IP needed to produce successful, on-time products.
Virage Logic's semiconductor IP platform strategy calls for the delivery of Technology-Optimised Platforms for a broad range of third-party foundry and integrated device manufacturer (IDM) processes.
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