Licence targets Chinese ASIC growth

Semiconductor Manufacturing International Corp has licensed Virage Logic's technology-optimised semiconductor IP platform for use on its advanced 0.18-micron CMOS process.

Semiconductor Manufacturing International Corp (SMIC) has licensed Virage Logic's technology-optimised semiconductor IP platform for use on its advanced 0.18-micron CMOS process.

This agreement gives SMIC's customers access to Virage Logic's technology-optimised platform for high-volume, high-density and high-performance complex and mainstream SoC designs.

"As one of the leading semiconductor IP companies in the world, Virage Logic's silicon-proven technology-optimised platform provides customers with reliable and manufacturable IPs, thus reducing risk and shortening the design cycle", said Dr Sam T Wang, President of SMIC Americas.

"The platform consists of a portfolio of embedded memories, logic library cells, and standard I/O cells that are optimised to SMIC's 0.18-micron design rules".

With Virage Logic's extensive quality assurance efforts through its FirstPass-Silicon characterisation program, SMIC will have silicon-proven IP that is not only reliable and manufacturable, but also compatible with customers' required specifications.

Virage Logic's FirstPass-Silicon characterisation program provides an industry benchmark in quality, reliability and completeness.

"With the Chinese semiconductor market expected to grow nearly 200% by 2006 to around US $31 billion, we are pleased to work with SMIC to satisfy the industry's demand for silicon-proven IP", said Adam Kablanian, President and CEO, Virage Logic.

"SMIC's advanced foundry technology and dedicated services, combined with our technology-optimised platform, will provide customers worldwide with access to advanced manufacturing capability in China".

Building on its technology and market leadership position, Virage Logic's technology-optimised platforms aim to meet the critical requirements of reducing silicon costs and failure risks, while boosting performance and ensuring high manufacturing yields for a particular foundry or integrated device manufacturer (IDM) process.

By providing silicon-proven, integrated IP that is compatible with all the major EDA flows, Virage Logic's technology-optimised platforms address the needs of complex and mainstream SoC designs.

Virage Logic's technology-optimised platforms are based on its highly differentiated IP including the Self-Test and Repair (STAR) Memory System, the Area, Speed and Power (ASAP) Memory product line, the ASAP Logic standard cell libraries, and the recently introduced Base I/O libraries.

Technology-optimised platforms enable customers to expedite the creation of next-generation products by addressing the increasingly complex task of identifying and obtaining the semiconductor IP needed to produce successful, on-time products.

Virage Logic"s semiconductor IP platform strategy calls for the delivery of technology-optimised platforms for a broad range of third-party foundry and IDM processes.

Virage Logic's technology-optimised platform for SMIC's 0.18-micron process will be available in Q4 2003.

Back to top