Product category:
Intellectual Property Cores
News Release from: Virage Logic
Edited by the Electronicstalk Editorial
Team on 04 November 2003
Chinese foundry picks Virage IP
Semiconductor Manufacturing International Corp, one of China's most advanced foundries, has selected Virage Logic as its IP provider.
Semiconductor Manufacturing International Corp (SMIC), one of China's most advanced foundries, has selected Virage Logic as its IP provider This is in addition to the earlier agreement between the two companies on 0.18-micron technology
This article was originally published on Electronicstalk on 22 Oct 2002 at 8.00am (UK)
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This new agreement will make Virage Logic's silicon-proven Technology-Optimized semiconductor IP Platforms available on SMIC's advanced 0.13-micron CMOS process.
"We are very pleased to expand our cooperation with Virage Logic, one of the industry's leading IP providers.
With its broad portfolio of highly differentiated IP, Virage Logic's silicon-proven Technology-Optimized Platforms meet the stringent innovation and quality needs of SMIC's customers worldwide", said Dr Sam T Wang, President, SMIC Americas.
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"Also, with Virage Logic's ability to respond 24/7 and proven track record of superior customer support, we can better service our customers to help them meet their time-to-market and time-to-volume pressures without sacrificing quality".
"We are honoured that SMIC has selected Virage Logic as its IP provider to service their growing worldwide customer base.
Our Technology-Optimized Platforms provide SMIC's customers with a single source for fully tested and validated IP that addresses such critical needs as density, performance and power", said Adam Kablanian, President and CEO, Virage Logic.
"We also work very closely with our customers to ensure high manufacturing yields that dramatically cut silicon and system costs".
Building on its technology and market leadership position, Virage Logic's Technology-Optimized Platforms aim to meet the critical requirements of reducing silicon costs and failure risks, while boosting performance and ensuring high manufacturing yields for a particular foundry or IDM process.
By providing silicon-proven, integrated IP that is compatible with all the major EDA flows, Virage Logic's Technology-Optimized Platforms address the needs of complex and mainstream SoC designs.
Virage Logic's Technology-Optimized Platforms are based on its highly differentiated IP, including the Self-Test and Repair (STAR) Memory System, the Area, Speed and Power (ASAP) Memory product line, the ASAP Logic standard cell libraries, and the company's Base I/O libraries.
Technology-Optimized Platforms enable customers to expedite the creation of next-generation products by addressing the increasingly complex task of identifying and obtaining the semiconductor IP needed to produce successful, on-time products.
Virage Logic's semiconductor IP platform strategy calls for the delivery of Technology-Optimized Platforms for a broad range of third-party foundry and IDM processes.
Virage Logic's Technology-Optimized Platforms for SMIC's 0.13-micron CMOS process is targeted for release by the first quarter of 2004.
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