Product category:
Intellectual Property Cores
News Release from: Virage Logic | Subject: Technology-Optimized Platforms for DongbuAnam
Edited by the Electronicstalk Editorial
Team on 19 February 2004
Platforms optimised for Korean
0.13-micron line
Virage Logic's Technology-Optimized Platforms will shortly be available on the new 0.13-micron CMOS processes at DongbuAnam Semiconductor, the world's fourth-largest foundry.
DongbuAnam Semiconductor, the world's fourth-largest foundry, and Virage Logic have entered into a licensing and royalty-bearing agreement that provides for the delivery of Virage Logic's Technology-Optimized Platforms for DongbuAnam's new 0.13-micron CMOS processes This agreement marks the first commercial IP support for DongbuAnam's new 0.13-micron process offering
This article was originally published on Electronicstalk on 22 Oct 2002 at 8.00am (UK)
Related stories
Logic libraries cut silicon costs
Long known in the embedded memory market, Virage Logic is extending its role to the broader category of semiconductor IP platforms with its first foray into logic components.
Metal programmable cells join RapidChip platform
LSI Logic has licensed ASAP metal programmable cells from Virage Logic for use in its RapidChip silicon platform.
Under the terms of the agreement, DongbuAnam customers will have access to Virage Logic's Technology-Optimized Platforms - comprising highly differentiated, silicon-proven embedded memories, standard cell logic libraries and I/O libraries - on DongbuAnam's 0.13-micron generic (G) and 0.13-micron low power (LP) CMOS processes.
In addition, customers with designs featuring Virage Logic memory IP on the 0.18-micron process can now take their designs to DongbuAnam in order to take advantage of the price and performance benefits realised on DongbuAnam's 0.18-micron process technology.
"Virage Logic's focus on delivering highly differentiated IP that is silicon-proven and backed by superior customer support makes them an ideal partner for DongbuAnam", said Jae Song, Executive Vice President of Worldwide Marketing, DongbuAnam Semiconductor.
Further reading
TSMC lends library support to SoC design efforts
TSMC and Virage Logic have signed a distribution and support agreement that will provide designers with highly integrated library support and services for SoC design.
Embedded memory aids video-over-networks solution
ViXS Systems has selected the Virage Logic ASAP Memory product for its innovative IP-based video distribution system that delivers broadcast-quality video over networks.
Deal adds high-density memory to SoC line-up
Virage Logic has strengthened its relationship with Atmel by expanding its license agreement to include the company's Area, Speed and Power (ASAP) Memory product line on the 0.13-micron process.
"As we introduce our first 0.13-micron offering, the availability of Virage Logic's Technology-Optimized Platform on this new process will enable us to provide our growing worldwide customer base with a competitive advantage in terms of cost, performance, time to market and time to volume".
"DongbuAnam's rapid rise to becoming one of the leading foundries in the marketplace is very impressive and we look forward to working closely with them to service the needs of the rapidly growing global electronics market", said Adam Kablanian, Virage Logic President and CEO.
"They are focused on providing a superior, comprehensive solution to their customers and we believe our Technology-Optimized Platforms will help them accomplish that goal.
Our IP offering provides a customised portfolio grounded in advanced technology that addresses such needs as density, performance and power while providing a means to reduce silicon and system costs".
Building on its technology and market leadership position, Virage Logic's Technology-Optimized Platforms aim to meet the critical requirements of reducing design time, silicon area and design risk; while boosting performance and enhancing manufacturing yields for a particular foundry or integrated device manufacturer (IDM) process.
By providing silicon-proven, fully characterised IP that is tuned to all major EDA design tools and flows, Virage Logic's Technology-Optimized Platforms address the needs of complex and mainstream SoC designs.
Virage Logic's Technology-Optimized Platforms are based on the Area, Speed and Power (ASAP) Memory High-Density (HD) memories, the ASAP Logic HD standard cell libraries, and the company's Base I/O libraries.
Technology-Optimized Platforms help customers expedite the creation of next-generation SoCs by providing silicon-proven IP optimised for a targeted technology node and process.
Technology-Optimized Platform users have optional access to Virage Logic's rich portfolio of highly differentiated IP including the Self-Test and Repair (STAR) Memory System, the ASAP Memory High-Speed (HS) and Ultra-Low-Power (ULP) product lines, the ASAP Logic Ultra-High-Density (UHD) Standard Cell Libraries, the patented ASAP Logic HD and HS Metal Programmable Cell Libraries, and access to specialty I/Os such as SSTL-2, HSTL-2, PCI and PCI-X, and USB1.1.
Virage Logic's semiconductor IP platform strategy calls for the delivery of Technology-Optimized Platforms for a broad range of third-party foundry and IDM processes in order to offer customers maximum flexibility in their design choices.
Virage Logic's Technology-Optimized Platforms for DongbuAnam's 0.13-micron CMOS process will be available in April 2004.
• Virage Logic: contact details and other news
• Email this article to a colleague
• Register for the free Electronicstalk email newsletter
• Electronicstalk Home Page

