Memory IP verifies latest MIPS core

Virage Logic's Area, Speed and Power (ASAP) Memory High-Speed (HS) IP was used to demonstrate the industry-leading performance of the new MIPS32 24K family of processor cores.

Virage Logic's Area, Speed and Power (ASAP) Memory High-Speed (HS) IP was used to demonstrate the industry-leading performance of the new MIPS32 24K family of processor cores.

"Our strategy is to ensure that 24K core customers can achieve industry leading performance in a small silicon footprint and within the constraints of tight development schedules.

By offering a proven, reliable core that can incorporate industry-leading technology, such as Virage Logic's ASAP Memory product, we are helping SoC designers reach their goals in a standard environment", said Victor Peng, Vice President of Engineering at MIPS Technologies.

Increasingly complex SoCs require greater amounts of memory, which present significant wafer yield issues.

Using Virage Logic's silicon-proven embedded memory IP, designers can integrate small, moderate or large amounts of on-chip memory to reduce overall system cost and size, while meeting time-to-market requirements.

The ASAP Memory HS product is suited for high-volume applications where high-speed, area-efficient memory implementation is a requirement.

"By going the extra mile and using Virage Logic's high-speed memory IP to help ensure the 24K cores perform as intended, MIPS Technologies is giving its customers greater leverage to quickly achieve their design goals with a significant performance and time-to-market advantage", said Jim Ensell, Vice President of Marketing for Virage Logic.

"Virage Logic is pleased to be a part of the launch of the highest-performing synthesisable processor cores in the industry and congratulates MIPS Technologies on its 24K core family".

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