Product category:
Intellectual Property Cores
News Release from: Virage Logic
Edited by the Electronicstalk Editorial
Team on 06 February 2006
Webinar series addresses SoC design
issues
A series of free online seminars aims to provide SoC designers with the up-to-date skills and resources needed to meet design demands at advanced process nodes.
Building on its legacy of leadership in semiconductor IP (intellectual property), Virage Logic is creating a series of free technical tutorials in the form of online seminars (webinars) to provide SoC designers with the up-to-date skills and resources needed to meet design demands at advanced process nodes Each webinar in the series will address a pertinent design challenge facing SoC designers today
This article was originally published on Electronicstalk on 22 Oct 2002 at 8.00am (UK)
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Topics in the series will include low-power solutions, optimised yield, high-performance design, security and others.
The series of eight webinars will be broadcast on TechOnLine throughout the year, with the first taking place on 16th February 2006.
Virage Logic will join forces with a different industry-leading company from its VIP Partner Programme for each informative webinar presentation that will provide an integrated approach to helping SoC designers successfully leverage the most advanced technologies available for accelerating their silicon success.
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Some of the Virage Logic partners who are on tap for the series include Cadence Design Systems, Discretix, Magma Design Automation, MIPS Technologies, Silterra and Synopsys.
The technical presentations will arm designers with cutting-edge information, reference flows, and seamless integration of technology to help tackle critical design challenges and to stay abreast of today's most innovative and advanced technology solutions.
"Last year's successful worldwide seminar series, highlighting Virage Logic's Silicon Aware IP , reinforced our belief that SoC designers are hungry for educational content that helps them meet their design requirements", said Jim Ensell, Vice President of Marketing and Business Development at Virage Logic.
"The upcoming series of collaborative webinar presentations will help empower designers with information to meet their power, timing, manufacturability, performance, and area goals to accelerate silicon success".
Virage Logic's VIP Partner Programme brings together technology and business alliances with partner companies to provide a broad range of complementary solutions for SoC design including design services, EDA/test, foundry and intellectual property (IP).
The VIP Partner Programme's mission is to help increase interoperability and provide access to complete solutions that enable mutual customers to accelerate silicon success by reducing design time and improving manufacturability.
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