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News Release from: Virage Logic | Subject: Core-Optimised IP Kits
Edited by the Electronicstalk Editorial
Team on 17 November 2006
IP kits are optimised for MIPS cores
Virage Logic Corp and MIPS Technologies have announced instant, easy access to a series of jointly developed Core-Optimised IP Kits via Virage Logic's website.
Virage Logic Corp and MIPS Technologies have announced instant, easy access to a series of jointly developed Core-Optimised IP Kits via Virage Logic's website Leveraging Virage Logic's Area, Speed and Power (ASAP) Memory and ASAP Logic High-Speed (HS) IP, the series of Core-Optimised IP Kits introduced earlier this year provides MIPS Technologies' customers with IP that is specifically tuned to enhance the performance of MIPS processor cores
This article was originally published on Electronicstalk on 24 Oct 2005 at 8.00am (UK)
Related stories
Optimised IP kits make the most of MIPS cores
New core-optimised IP kits comprise Virage Logic Area, Speed and Power (ASAP) Memory and ASAP Logic IP specifically tuned to maximise the performance of MIPS Technologies processors.
Logic libraries cut silicon costs
Long known in the embedded memory market, Virage Logic is extending its role to the broader category of semiconductor IP platforms with its first foray into logic components.
The Core-Optimised IP Kits target the MIPS32 24K, 24KE and 34K families of processor cores for manufacture on TSMC's 90nm G process.
The 24K and 24KE processor core families can achieve clock frequencies of 660MHz, using only nominal threshold transistors when implemented with the Core-Optimised IP Kits.
"time to market is time-to-money when it comes to SoC design", said Pete Del Vecchio, Product Marketing Manager at MIPS Technologies.
Further reading
Metal programmable cells join RapidChip platform
LSI Logic has licensed ASAP metal programmable cells from Virage Logic for use in its RapidChip silicon platform.
TSMC lends library support to SoC design efforts
TSMC and Virage Logic have signed a distribution and support agreement that will provide designers with highly integrated library support and services for SoC design.
Embedded memory aids video-over-networks solution
ViXS Systems has selected the Virage Logic ASAP Memory product for its innovative IP-based video distribution system that delivers broadcast-quality video over networks.
"Making our jointly developed Core-Optimised IP Kits readily available on the Virage Logic website allows our customers to enhance their system performance, reduce design time and speed the delivery of best-in-class products".
"We are very pleased to offer our mutual customers instant access to the Virage Logic Core-Optimised IP Kits for the MIPS32 24K, 24KE and 34K families of processor cores", said Jim Ensell, Senior Vice President of Marketing and Business Development at Virage Logic.
"This collaboration is yet another example of how we are working closely with our VIP Partner companies to provide customers with highly differentiated IP to help them accelerate their silicon success".
The MIPS32 24K and 24KE core families offer performance of 660MHz in a 90nm G process, while minimising design time and reducing product costs.
These processor cores are suited to embedded consumer applications such as digital and interactive TVs, set-top boxes and DVD players.
The 24KE cores integrate the MIPS DSP Application-Specific Extension (ASE), providing up to 3x the signal processing performance over a range of embedded applications, when compared with RISC implementations without the DSP ASE.
The 34K core family is the first series of licensable MIPS cores that offers SoC designers a superior hardware multithreading solution to boost system performance while significantly reducing overall SoC die area, cost, and power consumption.
The 34K cores are designed to mask the effect of memory latency and other short-term pipeline stalls by increasing processor utilisation.
Virage Logic's Core-Optimised IP Kits are specifically tuned to maximise the performance of a target processor.
The 24K and 24KE processor families will hit clock frequencies of 660MHz when implemented with the Core-Optimised IP Kit, which includes Virage Logic's ASAP Memory High-Speed (HS) instances and ASAP Logic HS standard cell libraries.
Customers may access the Virage Logic Core-Optimised IP Kits for the MIPS32 24K, 24KE and 34K cores by visiting the Virage Logic website and registering to become a member.
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