Mezzanine card is on time for synchronisation

Module provides up to five phase-matched low-jitter sample clocks for high speed analogue to digital convertors at rates of up to 2GHz per channel.

A flexible high-frequency clock generator PMC/XMC module provides up to five phase-matched low-jitter sample clocks for high speed analogue to digital convertors at rates of up to 2GHz per channel.

The XCLK1 solves the difficult problem of generating high-speed clock sources in a small, low cost format suitable for high-performance embedded applications such as sigint, spectral analysis and radar.

High frequency analogue to digital convertors require stable, low jitter clock sources, which until now have tended to be bulky.

By shrinking this functionality into a space that can be accommodated by any industry standard PMC or XMC site, multichannel signal acquisition can now be more cost effective and requires less space.

The XCLK1 offers the choice of internal or external clock reference sources.

The default clock source is an onboard 10MHz TCXO (temperature compensated crystal oscillator).

Local frequency multiplication based on this reference can generate output signals in the range of 500MHz to 2GHz with a jitter of less than 0.5ps.

The output clock is available through five single-ended or three differential front panel outputs.

Alternatively, the XCLK1 can derive its outputs from an external source; either a front panel RF (0 to 2GHz) input, 10MHz front panel reference or 10MHz from its PMC user I/O connector.

When providing a clock source to multiple acquisition cards, users often need to synchronise the trigger, or start of acquisition for all cards, so that multiple samples are coherent.

This is important for applications such as beamforming.

The XCLK1 helps solve this problem by being able momentarily halt all sample clock outputs using its trigger/reset input.

This gives time for all acquisition cards to be reset and to start to capture data synchronously.

Releasing all the clock outputs at once ensures that all data flows start together and are in step.

"High frequency phase matched clock sources are difficult to find in equipment suitable for embedded applications using formats such as VME or CompactPCI.

We recognised this need in the market and developed the XCLK1 to fit onto existing PMC or XMC sites", explains Dave Barker, Vmetro's Vice President of Market Development.

"With the XCLK1 we have been able to achieve low jitter performance - a difficult but crucial requirement to meet at the multigigahertz frequencies that A/D cards are now supporting".

The XCLK1 is an ideal clock source for synchronising high speed analogue to digital convertor cards like the recently announced Vmetro AD1500 or AD3000 cards which sample at rates up to 3Gsample/s.

The XCLK1 is available in both air and conduction cooled configurations, starting at US $4995.

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