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Verisity Design

Address:
2041 Landings Drive
Mountain View
CA 94043
USA
Telephone: (USA) +1 650 934 6800

http://www.verisity.com

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Listing of all 29 news releases from Verisity Design:

Novel methodology decimates SoC verification times

Verisity has developed a new methodology that enables a 10x increase in productivity and improved predictability for automating the verification process at the SoC and system level.

News from Verisity Design (18 September 2003)

Software aids verification environment development

eAnalyzer is an intuitive static analysis and verification methodology compliance system that simplifies verification environment development.

News from Verisity Design (18 September 2003)

Faster verification for PCI Express-based chips

A new PCI Express e Verification Component (eVC) dramatically shortens the time needed to create a PCI Express-based verification environment.

News from Verisity Design (18 September 2003)

Institutions queue up for university programme

Verisity has significantly expanded its university programme with 22 new university members, bringing the total number of participating academic institutions to 45.

News from Verisity Design (16 September 2003)

National automates its verification processes

National Semiconductor has standardised on Verisity's Specman Elite verification process automation.

News from Verisity Design ( 8 August 2003)

Integration aims to speed verification

Tharas Systems has joined Verisity's Interoperability Partners (VIP) programme to develop an integration between its Hammer hardware accelerator and Verisity's eCelerator testbench acceleration tool.

News from Verisity Design (30 July 2003)

Aptix alliance to provide hardware acceleration

Aptix is to integrate its System Explorer hardware accelerator with Verisity's eCelerator testbench acceleration tool.

News from Verisity Design (30 July 2003)

Steady progress for Verisity

Verisity has published its financial results for the second fiscal quarter ended 30th June 2003.

News from Verisity Design (25 July 2003)

Design verification with e

"Design verification with e", by Samir Palnitkar details a broad range of e-based topics including modelling, constraint-driven test generation, functional coverage and assertion checking.

News from Verisity Design ( 5 June 2003)

Testbench supports more open standards

To better support system-level design flows, Verisity is supporting a wide variety of open standards through the Specman Elite testbench automation solution, including OVL, PSL/Sugar and SystemC.

News from Verisity Design ( 5 June 2003)

Verification language set for standardisation

The IEEE Design Automation Standards Committee has approved a project to use the e verification language as a basis for standardisation.

News from Verisity Design ( 5 June 2003)

Added components expand e-verification

YogiTech has developed three new e-verification components (eVCs) for the AT Attachment Packet Interface (ATAPI), Controller Area Network (CAN) and the Open Core Protocol (OCP).

News from Verisity Design ( 6 May 2003)

Increased re-use speeds testbench automation

Available now from Verisity is version 4.1 of the Specman Elite testbench automation solution.

News from Verisity Design (27 March 2003)

Training for verification methodology practices

To meet the increased demand for advanced verification methods, Verisity has set up a new training course - Specman Elite advanced training - that teaches verification methodology best practices.

News from Verisity Design (27 March 2003)

Verification components cover popular demand

Verisity is greatly expanding its offerings of eVerification Components (eVCs) in order to meet the increasing demand for reusable verification components for standard interfaces.

News from Verisity Design (27 March 2003)

Mentor joins alliance programme

Mentor Graphics has become the 100th member of Verisity's Verification Alliance programme.

News from Verisity Design (26 February 2003)

ISS adds regression testing expertise to programme

The ISS Group has joined the Verisity Interoperability Partners (VIP) programme.

News from Verisity Design (29 January 2003)

Verisity tops Dataquest survey

Verisity has been named the undisputed leader in the functional verification automation market according to the most recent study conducted by Gartner Dataquest.

News from Verisity Design ( 6 December 2002)

Infineon joins the e fan club

Infineon Technologies has joined the Verisity LicenseE programme.

News from Verisity Design (18 November 2002)

ARM aims for e standardisation

ARM has joined Verisity's LicenseE programme, with a view to opening up access to the e verification language.

News from Verisity Design (18 November 2002)

PMC-Sierra adds momentum to e

LSI Logic aids in e standardisation

Hanoch and Redmond set up international expansion

University programme gains momentum worldwide

Faster verification for PCI Express devices

Methodology for verification component development

Seminars address methodologies for verification

Verification software puts SoCs on the testbench

Increases all round for Verisity

 

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