Seminars address methodologies for verification

Verisity is to run a series of verification methodology seminars in the autumn of 2002.

Verisity is to run a series of verification methodology seminars in the autumn of 2002.

Verisity's Verification Methodology 2002 seminars will feature a step-by-step, "cookbook-style" approach that will expose attendees to advanced verification methodologies and techniques, including coverage-based verification, assertion creation, verification re-use and testbench acceleration.

In addition, attendees will hear from engineers who've used these methodologies and see that advanced verification methodologies are real and being used successfully in complex IC, SoC and system designs today.

The Verification Methodology 2002 seminars will be offered in North America, Europe and Asia from September to November 2002.

The seminars are highly technical, focusing on verification methodology and techniques and will incorporate tools such as testbench automation, testbench acceleration, verification reuse and code coverage analysis.

At the seminar, attendees will learn: verification strategies including test plan creation; a coverage-based approach to functional verification; using assertions and how they fit into today's overall testbench strategy; how to automate their verification process by quickly developing a smart testbench, including directed random generation strategies, scoreboarding, protocol checkers, and functional coverage techniques; verification reuse, facilitated by verification components and methodology to improve interoperability; and methodologies for accelerating testbenches.

The Verification Methodology seminars will be held in North America in September, Europe in October and Asia in November.

The full schedule and registration details are available on the Versity website.

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