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Product category: Design and Development Software
News Release from: Verisity Design
Edited by the Electronicstalk Editorial Team on 17 October 2002

University programme gains momentum
worldwide

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Verisity has expanded its University Programme with 16 new universities joining in less than a year, bringing the total number of participating academic institutions to 27.

Verisity has expanded its University Programme with 16 new universities joining in less than a year, bringing the total number of participating academic institutions to 27 Commenced in December 2001 with 11 charter members, the programme enables students to gain valuable experience with best-in-class verification solutions, and better prepares the next generation of verification engineers for real-world experiences

As functional verification becomes an increasingly critical part of the overall design process, Verisity's University Programme is supplying universities with the latest in market-proven technology.

The 16 new programme members are: Bournemouth University, Poole, England; Concordia University, Quebec, Canada; De Montfort University, Leicester, England; Faculty of Electrical Engineering and Computing, Zagreb, Croatia; George Mason University, Fairfax, Virginia; Michigan State University, East Lansing, Michigan; North Carolina State University, Raleigh, North Carolina; Pennsylvania State University, University Park, Pennsylvania; Polytechnic University, Brooklyn, New York; Politecnico di Torino, Torino, Italy; State University of New York at New Paltz, New York; Syracuse University, Syracuse, New York; Transilvania University, Brasov, Romania; University of Bristol, Bristol, England; University of Pittsburgh, Pittsburgh, Pennsylvania; Washington University, St.

Louis, Missouri.

Verisity's University Programme was designed to support universities in their verification-related education and research.

The programme unites Verisity with universities all over the world by providing access to the most advanced verification technologies and methodologies.

University members receive free access to Verisity's functional verification solutions, including the e verification language, Specman Elite testbench automation and SureCov code coverage, as well as support for ongoing research projects.

"With Specman Elite quickly becoming the verification engine of choice for engineers worldwide, and e well on its way to becoming the verification language standard, it's imperative we get these solutions into the hands of students so they are prepared to address industry issues now and in the future", said Yaron Kashai, vice president of research and strategic technologies, Verisity Design.

"The industry's support of the program has been overwhelming due to critical need for well-trained students.

University Program members are laying a strong foundation for students by incorporating Verisity tools and methodologies into their curriculum, as well as advanced research projects".

"The growing shortage of verification engineers presents a critical problem for the microelectronics industry", said Dr Nazanin Mansouri, assistant professor at Syracuse University.

"The absence of functional verification from the computer engineering curriculums at most universities, as well as the unavailability of state-of-the-art verification tools to students, has fostered this shortage.

We believe that the solution of such deficiencies in microelectronics education relies on close partnership between universities and industry.

As an example, at Syracuse University we have been able to develop a course on testing and verification through collaboration with industry.

The use of Specman Elite gives students the opportunity to experiment with real designs, using an industrial-scale verification tool".

The increasing demand for Verisity solutions by universities is accredited, in part, to the company's reputation as the verification technology leader.

Universities are looking for leading tools by which to train their student population; and companies are looking for a substantial pool of well-trained student and graduate resources by which to hire from and conduct research.

The universities in the programme are using Verisity's solutions for a range of projects including, e-based tool research and development, student research projects in verifying complex designs, cooperative research with commercial companies, course laboratories, and tool and methodology instruction.

Any educational institution with research programmes focusing on innovative verification techniques, formal methods, language semantics and high-level specifications, or research projects involving complex verification tasks may join the programme.

Many universities are using Verisity tools to introduce functional verification concepts to their undergraduate students, while others are developing courses based on the e verification language for senior-level and graduate students.

"Students are the future verification engineers", states Vijaykrishnan Narayanan, professor at Pennsylvania State University.

"Hence, it is vital that they be exposed not only to concepts but also industrial-strength tools if they are to be productive in the real world.

In fact, we started a course due to industry feedback that students were better trained for design jobs as opposed to verification tasks".

Other programme members are using Verisity tools for research projects in co-operation with commercial companies.

"Our research policy is mainly based on mutual benefit between academia and industry", said Sofiene Tahar, associate professor at Concordia University in Canada.

"Specman Elite is no doubt one of the best testbench generators in the market.

Its cutting-edge technology is very promising for our on-going SoC verification endeavours".

Access to the e verification language and Verisity's industry-leading tools is proving to be invaluable to students and teachers alike.

At the University of Pittsburgh, professors teach courses in the verification of digital systems using VHDL, Verisity, Model Technology and IBM's Rulebase for seniors and first year graduate students.

"We teach Specman Elite to students who have had previous experience writing vector files by hand, and testbenches in VHDL", said Steven Levitan, assistant professor at the University of Pittsburgh.

"Once they 'get it' they're hooked".

"With Specman Elite, I'm able to do things that I didn't think possible in a verification environment", said Jixiong Yang, student at State University of New York at New Paltz.

"My classroom experience is preparing me for situations I will surely encounter in the commercial industry, and my knowledge of Specman Elite and the e verification language will make me significantly ahead of the learning curve when I graduate".

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