Visit the National Instruments web site
Click on the advert above to visit the company web site

Product category: Design and Development Software
News Release from: Verisity Design
Edited by the Electronicstalk Editorial Team on 30 July 2003

Integration aims to speed verification

Request your FREE weekly copy of the Electronicstalk email newsletter. News about Design and Development Software and more every issue. Click here for details.

Tharas Systems has joined Verisity's Interoperability Partners (VIP) programme to develop an integration between its Hammer hardware accelerator and Verisity's eCelerator testbench acceleration tool.

Tharas Systems has joined Verisity's Interoperability Partners (VIP) programme to develop an integration between its Hammer hardware accelerator and Verisity's eCelerator testbench acceleration tool An integrated solution between eCelerator and Tharas' Hammer hardware accelerator will provide users with significantly faster verification in a single environment for RTL and testbench acceleration

"Tharas' patented custom processor-based technology enables users to accelerate RTL, gate and some behavioural constructs while maintaining the ease-of-use and debug productivity of software simulators", said Sanjay Sawant, Director of Marketing and Business Development at Tharas Systems.

"By integrating Hammer with Verisity's eCelerator, users will now be able to accelerate a majority of their testbench, while keeping all of the power of Specman Elite".

Tharas Systems' Hammer provides Verilog, VHDL and mixed-language accelerated simulations while offering the industry's fastest compile, ease-of-use and debug capabilities comparable to that of software simulators.

Verisity's eCelerator combines the power of the Specman Elite verification process automation with the high performance of hardware-assisted verification.

An integrated solution between Hammer and eCelerator enables engineers to synthesise and accelerate their testbenches written in the e verification language onto Hammer's custom processor engine.

This integration enables engineers to bring hardware verification earlier into the design process and use a single environment throughout the verification flow.

"An integrated solution between Hammer and eCelerator provides verification engineers working at the system level with an automated method of ensuring that their design works in the system environment, before going to silicon.

Hammer enables our mutual customers to turn multiple designs in a day", said Dave Tokic, director of strategic marketing for Verisity.

"We welcome Tharas to the VIP programme and look forward to working with them to provide our mutual customers with a single, automated verification flow".

Verisity Design: contact details and other news
Email this article to a colleague
Register for the free Electronicstalk email newsletter
Electronicstalk Home Page

Search the Pro-Talk network of sites

Visit the National Instruments web site