Product category:
Programmable Logic Devices
News Release from: XMOS Semiconductors | Subject: XCore
Edited by the Electronicstalk Editorial
Team on 29 November 2007
Software defined silicon nears reality
Innovative multiprocessor approach to configurable semiconductor devices brings a new level of flexibility and low cost to a broad range of consumer applications.
XMOS Semiconductor has created working silicon and beta design tools for its Software Defined Silicon (SDS), a new class of programmable semiconductor Test chips were produced by TSMC on its 90nm G process
This article was originally published on Electronicstalk on 12 Jul 2007 at 8.00am (UK)
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Programmable silicon is made for consumer designs
Software Defined Silicon aims to provide consumer electronics system designers with the unit cost advantage of SoCs and the flexibility of FPGAs.
Programmable devices sport 32bit RISC processors
XS1-G devices suit products requiring programmable flexibility and differentiation but which cannot support the relatively high cost of traditional programmable logic solutions.
XMOS' innovative multiprocessor approach to configurable semiconductor devices brings a new level of flexibility and low cost to a broad range of consumer applications.
Central to the XMOS technology is a compact event-driven multithreaded processor called XCore.
With up to 500MIPs to share across up to eight threads, the XCore engine readily implements a range of complex hardware functions.
Access to its computational and control capabilities is through a familiar embedded software design flow.
By using C-based behavioural languages, designers can quickly map white-board functional specifications into silicon.
David May, CTO and founder of XMOS says: "We estimate that the world's universities are producing 20-30 software designers for every hardware engineer".
"This shouldn't be a surprise, since the responsibility of product differentiation increasingly lies in the software domain".
"By introducing an accessible and familiar processor architecture, tightly coupled with an event-driven system and multithreading philosophy we are offering today's silicon designers with the tools they really need".
The XCore processor is tightly coupled to the outside world through a set of event driven input-output ports, and inter-thread communication is provided by XLink, a channel mechanism that allows threads and XCores to interact at the hardware level.
These bridges between the physical world and the processor engine provide a stable and simple interface for the software designer and the hardware engineer.
Design tools and engineering samples of first-generation XMOS SDS chips will be available in the first half of 2008.
Production volumes will follow 1-2 quarters later.
These devices will be in the US $1-10 cost range to support cost-sensitive, high volume applications.
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