Product category:
Design and Development Software
News Release from: Zuken | Subject: Package Predictor
Edited by the Electronicstalk Editorial
Team on 29 July 2002
Package design tool gains time-saving
functions
Zuken has added two new time-saving enhancements to its Package Predictor advanced packaging solution for designers developing single- or multichip IC packages.
Zuken has added two new time-saving enhancements to its Package Predictor advanced packaging solution for designers developing single- or multichip IC packages Both offer early-stage insights into critical tradeoffs in package layout and assembly
This article was originally published on Electronicstalk on 6 Nov 2001 at 8.00am (UK)
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The package re-use function allows engineers to determine whether an existing package design is practical, rather than having to develop a new package for each new die.
It suggests the best die I/O placement and allows designs to be tailored to existing packages wherever possible, minimising costs and time to market.
Compared with existing methods the typical time saving is 75%.
A new feasibility analysis function assists in importing die definitions, examining chip to package relationships, assigning nets, and defining design rules.
It also helps ensure effective design of power rings and wire-bond fan-outs.
Feasibility analysis can be used with a wide range of package types including flip-chip, CSP, MCM and stacked-die.
The function determines the minimum number of layers needed and gives users the ability to quickly run tradeoff analysis between wire-bond and flip-chip technologies within a given IC.
It is supported by a robust graphical environment and enables designers to optimise their packages by balancing size, cost and performance requirements while achieving time savings of up to 85% compared with existing methodologies. Request a free brochure from Zuken ...
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